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NASA NTRS ยท 19780012839

Microprocessor-to-system/370 interface

Abstract

The design and operation of a microprocessor interface unit which allows use of a computer terminal for communication at 110 or 300 baud both with a central host computer and with the microprocessor monitor are documented. Additionally, the interface permits the host computer to load the microprocessor memory directly with object code, avoiding the use of intermediate data storage such as paper tape. The central computer, containing an assembler language processor for the target microcomputer, can be used from the terminal with all the flexibility offered by the virtual machine facility, producing object code for the micro plus program listings and supporting outputs. The object code can then be loaded directly to the micro and the same terminal device used to run the micro program, communicating with the micro's monitor routine.

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BibTeXRIS

Lilley, R. W.. 1978-02-01. Microprocessor-to-system/370 interface. https://ntrs.nasa.gov/citations/19780012839

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