Dynamic Response to Electro-Optical Control of Diamond Based Non-Volatile Photo-Switch
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Engineering↗
Engineering topics
Nemanich, Robert (ORCID:0000000335768178)
Publications and source records attributed to Nemanich, Robert (ORCID:0000000335768178).
Reduced trap state density in AlGaN/GaN HEMTs with low-temperature CVD-grown BN gate dielectric
In this Letter, low-temperature (400 °C) chemical vapor deposition-grown boron nitride (BN) was investigated as the gate dielectric for AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) on a Si substrate. Comprehensive characterizations using x-ray photoelectron spectroscopy, reflection electron energy loss spectroscopy, atomic force microscope, high-resolution transmission electron microscopy, and time-of-flight secondary ion mass spectrometry were conducted to analyze the deposited BN dielectric. Compared with conventional Schottky-gate HEMTs, the MISHEMTs exhibited significantly enhanced performance with 3 orders of magnitude lower reverse gate leakage current, a lower off-state current of 1 × 10−7 mA/mm, a higher on/off current ratio of 108, and lower on-resistance of 5.40 Ω mm. The frequency-dependent conductance measurement was performed to analyze the BN/HEMT interface, unveiling a low interface trap state density (Dit) on the order of 5 × 1011–6 × 1011 cm−2 eV−1. This work shows the effectiveness of low-temperature BN dielectrics and their potential for advancing GaN MISHEMTs toward high-performance power and RF electronics applications.
Physics↗
Device and material investigations of GaN enhancement-mode transistors for Venus and harsh environments
This Letter reports the device and material investigations of enhancement-mode p-GaN-gate AlGaN/GaN high electron mobility transistors (HEMTs) for Venus exploration and other harsh environment applications. The GaN transistor in this work was subjected to prolonged exposure (11 days) in a simulated Venus environment (460 °C, 94 bar, complete chemical environment including CO2/N2/SO2). The mechanisms affecting the transistor performance and structural integrity in harsh environment were analyzed using a variety of experimental, simulation, and modeling techniques, including in situ electrical measurement (e.g., burn-in) and advanced microscopy (e.g., structural deformation). Through transistor, Transmission Line Method (TLM), and Hall-effect measurements vs temperature, it is revealed that the mobility decrease is the primary cause of reduction of on-state performance of this GaN transistor at high temperature. Material analysis of the device under test (DUT) confirmed the absence of foreign elements from the Venus atmosphere. No inter-diffusion of the elements (including the gate metal) was observed. The insights of this work are broadly applicable to the future design, fabrication, and deployment of robust III-N devices for harsh environment operation.
Physics↗