Norman F. Prokop | Search NASA

NASA NTRS2025

Design and Simulation of Greatly Improved Future Generation 4H-SiC JFET-R Integrated Circuits for Prolonged 500 °C Operation

This work compares design layouts and circuit simulations of the next two prototype NASA Glenn SiC JFET-R IC fabrication runs designated “IC Gen. 12” and “IC Gen. 13”. Even though both generations employ the same physical JFET gate length and chip size, SPICE simulations predict drastic improvements to IC capabilities and performance metrics for Gen. 13 over Gen. 12. The main factors behind simulated performance differences are thinner n-channel layer leading to reduced operating voltages and switch to stepper-based photolithography that enables roughly 4-fold layout area reductions for functionally identical circuit blocks.

Silicon Carbide↗

NASA NTRS2023

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

NASA NTRSDate not supplied

Photovoltaic Investigation on the Lunar Surface (PILS): Design Considerations and Ground Testing

The PILS (Photovoltaic Investigation on the Lunar Surface) platform consists of flight demonstrations of multiple solar cell technologies that could be used for future lunar missions. It also includes a solar charging experiment to shape design considerations of high voltage solar arrays on the Moon that could power in-situ resource utilization systems and other lunar surface assets. This poster and conference proceedings describe the design considerations of the PILS platform and ground testing performed prior to spacecraft integration. The platform is expected to operate on the lunar surface at Lacus Mortis in late 2022.

photovoltaics↗

NASA NTRSDate not supplied

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

NASA NTRSDate not supplied

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

NASA NTRSDate not supplied

Interactive Mars: A Direct-Experience Mission

As NASA prepares to explore Mars, we describe an innovative architecture that could be based on public-private partnerships to offset the costs of such a mission, while demonstrating many of the key technologies—propulsion, communications, autonomy, and landing systems—that will be needed for future human exploration. We propose that NASA could use this capability to deliver dozens of small rovers to several sites on Mars to enable the creation of interactive games that would be operated commercially and sponsored privately. NASA would get a reduced cost to demonstrate a portion of the infrastructure needed for human exploration, and the private sector would get access to a new market and sponsorship opportunities for a broadly popular activity. In addition, our proposed architecture could enable a new, intuitive means for scientists to interpret data and conduct ground operations. This proposal is to broadly develop the overall concept, while focusing on the design of the novel communications system, developing requirements for the software architecture needed to control the rovers and implement gaming, and developing gaming concepts.

Carolyn R. Mercer↗