Engineering topics

Spry, David J.

Publications and source records attributed to Spry, David J..

47 records · Page 3

NASA NTRS2008

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

Neudeck, Philip G.↗

NASA NTRS2007

Hydrogen Gas Sensors Fabricated on Atomically Flat 4H-SiC Webbed Cantilevers

This paper reports on initial results from the first device tested of a "second generation" Pt-SiC Schottky diode hydrogen gas sensor that: 1) resides on the top of atomically flat 4H-SiC webbed cantilevers, 2) has integrated heater resistor, and 3) is bonded and packaged. With proper selection of heater resistor and sensor diode biases, rapid detection of H2 down to concentrations of 20 ppm was achieved. A stable sensor current gain of 125 +/- 11 standard deviation was demonstrated during 250 hours of cyclic test exposures to 0.5% H2 and N2/air.

Neudeck, Philip G.↗

NASA NTRS2006

SiC Field Effect Transistor Technology Demonstrating Prolonged Stable Operation at 500 C

While there have been numerous reports of short-term transistor operation at 500 degree C or above, these devices have previously not demonstrated sufficient long-term operational durability at 500 degree C to be considered viable for most envisioned applications. This paper reports the development of Silicone Carbi field effect transistors capable of long-term electrical operation at 500 degree C. A 6H-SiC MESFET was packaged and subjected to continuous electrical operation while residing in a 500 degree C oven in oxidizing air atmosphere for over 2400 hours. The transistor gain, saturation current (IDSS), and on-resistance (RDS) changed by less than 20% from initial values throughout the duration of the biased 500 degree C test. Another high-temperature packaged 6H-SiC MESFET was employed to form a simple one-stage high-temperature low-frequency voltage amplifier. This single-stage common-source amplifier demonstrated stable continuous electrical operation (negligible changes to gain and operating biases) for over 600 hours while residing in a 500 degree C air ambient oven. In both cases, increased leakage from annealing of the Schottky gate-to-channel diode was the dominant transistor degradation mechanism that limited the duration of 500 degree C electrical operation.

Neudeck, Philip G.↗

NASA NTRS2006

CFD Growth of 3C-SiC on 4H/6H Mesas

This article describes growth and characterization of the highest quality reproducible 3C-SiC heteroepitaxial films ever reported. By properly nucleating 3C-SiC growth on top of perfectly on-axis (0001) 4H-SiC mesa surfaces completely free of atomic scale steps and extended defects, growth of 3C-SiC mesa heterofilms completely free of extended crystal defects can be achieved. In contrast, nucleation and growth of 3C-SiC mesa heterofilms on top of 4H-SiC mesas with atomic-scale steps always results in numerous observable dislocations threading through the 3C-SiC epilayer. High-resolution X-ray diffraction and transmission electron microscopy measurements indicate non-trivial in-plane lattice mismatch between the 3C and 4H layers. This mismatch is somewhat relieved in the step-free mesa case via misfit dislocations confined to the 3C/4H interfacial region without dislocations threading into the overlying 3C-SiC layer. These results indicate that the presence or absence of steps at the 3C/4H heteroepitaxial interface critically impacts the quality, defect structure, and relaxation mechanisms of single-crystal heteroepitaxial 3C-SiC films.

Neudeck, Philip G.↗

NASA NTRS2006

Recent Results from Epitaxial Growth on Step Free 4H-SiC Mesas

This paper updates recent progress made in growth, characterization, and understanding of high quality homoepitaxial and heteroepitaxial films grown on step-free 4H-SiC mesas. First, we report initial achievement of step-free 4H-SiC surfaces with carbon-face surface polarity. Next, we will describe further observations of how step-free 4H-SiC thin lateral cantilever evolution is significantly impacted by crystal faceting behavior that imposes non-uniform film thickness on cantilever undersides. Finally, recent investigations of in-plane lattice constant mismatch strain relief mechanisms observed for heteroepitaxial growth of 3C-SiC as well as 2H-AlN/GaN heterofilms on step-free 4H-SiC mesas will be reviewed. In both cases, the complete elimination of atomic heterointerface steps on the mesa structure enables uniquely well-ordered misfit dislocation arrays to form near the heterointerfaces with remarkable lack of dislocations threading vertically into the heteroepilayers. In the case of 3C-SiC heterofilms, it has been proposed that dislocation half-loops nucleate at mesa edges and glide laterally along the step-free 3C/4H interfaces. In contrast, 3C-SiC and 2H-AlN/GaN heterofilms grown on 4H-SiC mesas with steps exhibit highly disordered interface misfit dislocation structure coupled with 100X greater density of dislocations threading through the thickness of the heteroepilayers. These results indicate that the presence of steps at the heteroepitaxial interface (i.e., on the initial heteroepitaxial nucleation surface) plays a highly important role in the defect structure, quality, and relaxation mechanisms of single-crystal heteroepitaxial films.

Neudeck, Philip G.↗

NASA NTRS2005

Measurements of Breakdown Field and Forward Current Stability in 3C-SiC P-N Junction Diodes Grown on Step-Free 4H-SiC

This paper reports on initial fabrication and electrical characterization of 3C-SiC p-n junction diodes grown on step-free 4H-SiC mesas. Diodes with n-blocking-layer doping ranging from approx. 2 x 10(exp 16)/cu cm to approx.. 5 x 10(exp 17)/cu cm were fabricated and tested. No optimization of junction edge termination or ohmic contacts was employed. Room temperature reverse characteristics of the best devices show excellent low-leakage behavior, below previous 3C-SiC devices produced by other growth techniques, until the onset of a sharp breakdown knee. The resulting estimated breakdown field of 3C-SiC is at least twice the breakdown field of silicon, but is only around half the breakdown field of <0001> 4H-SiC for the doping range studied. Initial high current stressing of 3C diodes at 100 A/sq cm for more than 20 hours resulted in less than 50 mV change in approx. 3 V forward voltage. 3C-SiC, pn junction, p+n diode, rectifier, reverse breakdown, breakdown field,heteroepitaxy, epitaxial growth, electroluminescence, mesa, bipolar diode

Neudeck, Philip G.↗

NASA NTRS2004

Web Growth Used to Confine Screw Dislocations to Predetermined Lateral Positions in 4H-SiC Epilayers

Silicon-carbide- (SiC-) based power devices could enable substantial aerospace electronics benefits over today's silicon-based electronics. However, present-day SiC wafers contain electrically harmful dislocations (including micropipes) that are unpredictably distributed in high densities across all commercial 4H- and 6H-SiC wafers. The NASA Glenn Research Center recently demonstrated a crystal growth process that moves SiC wafer dislocations to predetermined lateral positions in epitaxial layers so that they can be reproducibly avoided during subsequent SiC electronic device fabrication. The process starts by reactive ion etching mesa patterns with enclosed trench regions into commercial on-axis (0001) 4H- or 6H-SiC substrates. An example of a pregrowth mesa geometry with six enclosed triangular-shaped trench regions is shown. After the etch mask is stripped, homoepitaxial growth is carried out in pure stepflow conditions that enable thin cantilevers to grow laterally from the tops of mesas whose pregrowth top surfaces are not threaded by substrate screw dislocations. The image in the bottom figure shows the postgrowth structure that forms after the lateral cantilevers expand to coalesce and completely roof over each of the six triangular trench regions. Atomic force microscope (AFM) measurements of the roof revealed that three elementary screw dislocation growth spirals, each shown in the AFM insets of the bottom image on the previous page, formed in the film roof at three respective points of cantilever film coalescence. The image above shows the structure following an etch in molten potassium hydroxide (KOH) that produced surface etch pits at the dislocation defects. The larger KOH etch pits--S1, S2, and S3--shown in this image correspond to screw dislocations relocated to the final points of cantilever coalescence. The smaller KOH etch pits are consistent with epilayer threading edge dislocations from the pregrowth substrate mesa (P1, P3, and P4) and a final cantilever coalescence point (P2). No defects (i.e., no etch pits) are observed in other cantilevered portions of the film surface. On the basis of the principle of dislocation Burgers vector conservation, we hypothesize that all vertically propagating substrate dislocations in an enclosed trench region become combined into a single dislocation in the webbed film roof at the point of final roof coalescence. The point of final roof coalescence, and therefore the lateral location of a webbed roof dislocation, can be designed into the pregrowth mesa pattern. Screw dislocations with predetermined lateral positions can then be used to provide the new growth steps necessary for growing a 4H/6H-SiC epilayer with a lower dislocation density than the substrate. Devices fabricated on top of such films can be positioned to avoid the preplaced dislocations.

Powell, J. Anthony↗

NASA NTRS2003

Surface Characterization of 3C-SiC Mesa Heterofilms: Evidence for Growth by Edge/Corner Nucleation Mechanism

This paper presents the first detailed observations of unique surface morphologies of 3C-Sic films grown on 4W6H-SIC mesas by the step-free surface heteroepitaxy technique. The top surfaces of 3C-Sic films were extensively studied by optical microscopy and atomic force microscopy (AFM) as both film thickness (i.e,, growth time) and growth temperature (i.e., terrace nucleation rate) were varied following complete coverage of each 4W6H mesa by an initial 3C-Sic film. Almost all surface steps observed by AFM were 0.25 nm, the height of a single Si-C bilayer. However, strikingly different step patterns were observed, suggesting that radically different processes dominate the nucleation of new 3C-Sic bilayers on top of existing 3C-Sic film surfaces.

Trunek, Andrew J.↗

NASA NTRS2003

Step Free Surface Heteroepitaxy of 3C-SiC Layers on Patterned 4H/6H-SiC Mesas and Cantilevers

Most SiC devices are implemented in homoepitaxial films grown on 4H/6H-SiC wafers with surfaces 3 degrees to 8 degrees off-axis from the (0001) basal plane. This approach has not prevented many substrate crystal defects from propagating into SiC epilayers, and does not permit the realization of SiC heteropolytype devices. This presentation describes recent advances in SiC epitaxial growth that begun to overcome the above shortcomings for arrays of mesas patterned into on-axis 4H/6H-SiC wafers. First, we demonstrated that atomic-scale surface steps can be completely eliminated from 4H/6H-SiC mesas via on-axis homoepitaxial step-flow growth, forming (0001) basal plane surfaces (up to 0.4 mm x 0.4 mm) for larger than previously thought possible. Step-free surface areas were then extended by growth fo thin lateral cantilevers from the mesa tops. These lateral cantilevers enabled substrate defects to be reduced and relocated in homoepitaxial films in a manner not possible with off-axis SiC growth. Finally, growth of vastly improved 3C-SiC heterofilms was achieved on 4H/6H-SiC mesas using the recently develop step-free surface heteroepitaxy process. These epitaxial growth developments should enable improved homojunction and heterojunction silicon carbide prototype devices.

Neudeck, Philip G.↗

NASA NTRS2002

Enlargement of Step-Free SiC Surfaces by Homoepitaxial Web-Growth of Thin SiC Cantilevers

Lateral homoepitaxial growth of thin cantilevers emanating from mesa patterns that were reactive ion etched into on-axis commercial SiC substrates prior to growth is reported. The thin cantilevers form after pure stepflow growth removes almost all atomic steps from the top surface of a mesa, after which additional adatoms collected by the large step-free surface migrate to the mesa sidewall where they rapidly incorporate into the crystal near the top of the mesa sidewall. The lateral propagation of the step-free cantilevered surface is significantly affected by pregrowth mesa shape and orientation, with the highest lateral expansion rates observed at the inside concave comers of V-shaped pregrowth mesas with arms lengthwise oriented along the {1100} direction. Complete spanning of the interiors of V's and other mesa shapes with concave comers by webbed cantilevers was accomplished. Optical microscopy, synchrotron white beam x-ray topography and atomic force microscopy analysis of webbed regions formed over a micropipe and closed-core screw dislocations show that c-axis propagation of these defects is terminated by the webbing. Despite the nonoptimized process employed in this initial study, webbed surfaces as large as 1.4 x 10(exp -3) square centimeters, more than four times the pregrowth mesa area, were grown. However, the largest webbed surfaces were not completely free of bilayer steps, due to unintentional growth of 3C-SiC that occurred in the nonoptimized process. Further process optimization should enable larger step-free webs to be realized.

Neudeck, Philip G.↗

NASA NTRS2002

Characterization of 3C-SiC Films Grown on 4H- and 6H-SiC Substrate Mesas During Step-Free Surface Heteroepitaxy

This paper reports detailed structural characterization of 3C-SiC heteroepitaxial films grown on 4H- and 6H-SiC mesa surfaces. 3C-SiC heterofilms grown by the "step-free surface heteroepitaxy" process, free of double-positioning boundary (DPB) and stacking-fault (SF) defects, were compared to less-optimized 3C-SiC heterofilms using High Resolution X-ray Diffraction (HRXRD), High Resolution Cross-sectional Transmission Electron Microscopy (HRXTEM), molten potassium hydroxide (KOH) etching, and dry thermal oxidation. The results suggest that step free surface heteroepitaxy enables remarkably benign partial lattice mismatch strain relief during heterofilm growth.

Neudeck, Philip G.↗