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NASA NTRS2023

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

NASA NTRS2023

Metal Contact Processing Experiments Towards Realizing 500 °C Durable RF 4H-SiC BJTs

This paper presents results from metal contact processing experiments towards the implementation of durable 500 °C high-frequency 4H-SiC bipolar junction transistors (BJTs) . Specifically, p -type ohmic contacts have been demonstrated on a 0.25 μm-thick p -type homoepitaxial layer of doping 8 x 10 18 ± 4 x 10 18 cm -3 . Preliminary current-voltage characteristics of fabricated BJTs are presented.

4H-SiC BJT↗

NASA NTRSDate not supplied

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

NASA NTRSDate not supplied

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

NASA NTRSDate not supplied

800 °C Demonstrated kHz SiC IC Electronics and Pressure Sensors as Technical Foundation for Realizing MHz DARPA HOTS Goals

The HOTS program will develop a technology for high-bandwidth, high-dynamic-range sensing at high temperature. Performance will be validated through the development and demonstration of a pressure sensor module (i.e., integrated transducer and signal-conditioning microelectronics) achieving the following performance goals: NASA Glenn has unique technology experience in extreme environment pressure sensors & IC electronics, including at 800 °C in air, providing significant risk reduction in meeting DARPA HOTS goals. Appropriate partnership and tech transfer should accelerate realization of DARPA HOTS hard technical challenges.

SiC pressure sensor electronics high temperature↗

NASA NTRSDate not supplied

Metal Contact Processing Experiments Towards Realizing 500 °C Durable RF 4H-SiC BJTs

This paper presents results from metal contact processing experiments towards the implementationof durable 500 deg.C high-frequency 4H-SiC bipolar junction transistors (BJTs). Specifically, p-type ohmic contacts have been demonstrated on a 0.25 μm-thick p-type homoepitaxial layer of doping 8 x 1018± 4 x 1018cm-3. Finally, preliminary current-voltage characteristics of fabricated BJTs are presented.

RF SiC↗