Phase transition during inflation and the gravitational wave signal at pulsar timing arrays
Not provided.
Astronomy & Astrophysics↗
Engineering topics
Yang, Chen
Publications and source records attributed to Yang, Chen.
A Three-in-One Hybrid Strategy for High-Performance Semiconducting Polymers Processed from Anisole
The development of semiconducting polymers with good processability in green solvents and competitive electrical performance is essential for realizing sustainable large-scale manufacturing and commercialization of organic electronics. A major obstacle is the processability-performance dichotomy that is dictated by the lack of ideal building blocks with balanced polarity, solubility, electronic structures, and molecular conformation. Herein, through the integration of donor, quinoid and acceptor units, an unprecedented building block, namely TQBT, is introduced for constructing a serial of conjugated polymers. The TQBT, distinct in non-symmetric structure and high dipole moment, imparts enhanced solubility in anisole—a green solvent—to the polymer TQBT-T. Furthermore, PTQBT-T possess a highly rigid and planar backbone owing to the nearly coplanar geometry and quinoidal nature of TQBT, resulting in strong aggregation in solution and localized aggregates in film. Remarkably, PTQBT-T films spuncast from anisole exhibit a hole mobility of 2.30 cm 2 V -1 s -1 , which is record high for green solvent-processable semiconducting polymers via spin-coating, together with commendable operational and storage stability. The hybrid building block emerges as a pioneering electroactive unit, shedding light on future design strategies in high-performance semiconducting polymers compatible with green processing and marking a significant stride towards ecofriendly organic electronics.
36 MATERIALS SCIENCE↗
FPGA-Accelerated Range-Limited Molecular Dynamics
Long timescale Molecular Dynamics (MD) simulation of small molecules is crucial in drug design and basic science. To accelerate a small data set that is executed for a large number of iterations, high-efficiency is required. Recent work in this domain has demonstrated that among COTS devices only FPGA-centric clusters can scale beyond a few processors. The problem addressed here is that, as the number of on-chip processors has increased from fewer than 10 into the hundreds, previous intra-chip routing solutions are no longer viable. We find, however, that through various design innovations, high efficiency can be maintained. These include replacing the previous broadcast networks with ring-routing and then augmenting the rings with out-of-order and caching mechanisms. Others are adding a level of hierarchical filtering and memory recycling. Two novel optimized architectures emerge, together with a number of variations. These are validated, analyzed, and evaluated. We find that in the domain of interest speed-ups over GPUs are achieved. Finally, the potential impact is that this system promises to be the basis for scalable long timescale MD with commodity clusters.
97 MATHEMATICS AND COMPUTING↗