NASA NTRS · 19730011495
A high speed sequential decoder
Abstract
The performance and theory of operation for the High Speed Hard Decision Sequential Decoder are delineated. The decoder is a forward error correction system which is capable of accepting data from binary-phase-shift-keyed and quadriphase-shift-keyed modems at input data rates up to 30 megabits per second. Test results show that the decoder is capable of maintaining a composite error rate of 0.00001 at an input E sub b/N sub o of 5.6 db. This performance has been obtained with minimum circuit complexity.
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Lum, H., Jr.. 1972-12-01. A high speed sequential decoder. https://ntrs.nasa.gov/citations/19730011495
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