NASA NTRS · 19780000154
Strobe-margin test for plated memory systems
Abstract
Technique measures performance of plated-wire memories. Strobe-margin test (SMT) utilizes worst-case testing and automatically gives exact strobe margin. Test is automatic; thus, memory system-level test is superior to tests at component level that use artificial test conditions. Test is significant tool in design and test of plated-wire memory systems. It can rapidly quantify memory-system margin on each production unit and impact of any design changes.
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Anspach, T. E., Clarke, J. W., Constable, R. C.. 1978-10-01. Strobe-margin test for plated memory systems. https://ntrs.nasa.gov/citations/19780000154
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