NASA NTRS · 19810005482
Bubble memory module
Abstract
Design, fabrication and test of partially populated prototype recorder using 100 kilobit serial chips is described. Electrical interface, operating modes, and mechanical design of several module configurations are discussed. Fabrication and test of the module demonstrated the practicality of multiplexing resulting in lower power, weight, and volume. This effort resulted in the completion of a module consisting of a fully engineered printed circuit storage board populated with 5 of 8 possible cells and a wire wrapped electronics board. Interface of the module is 16 bits parallel at a maximum of 1.33 megabits per second data rate on either of two interface buses.
Keep this discovery
Explore connections, maps & timelines
Bohning, O. D., Becker, F. J.. 1980-12-01. Bubble memory module. https://ntrs.nasa.gov/citations/19810005482
Cite the original work for its findings. Save a collection to share your selection of sources.