NASA NTRS · 19830000521
Self-Checking Memory Interface
Abstract
Memory-interface integrated circuit not only detects errors in data from other circuits but also detects errors within itself. Memory-interface chip encodes 16-bit words with Hamming code for single-error correction or double-error detection. Chip used in fault-tolerant computers under development by NASA.
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Sievers, M. W., Rennels, D. A.. 1984-11-01. Self-Checking Memory Interface. https://ntrs.nasa.gov/citations/19830000521
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