Parameter extraction from spaceborne MOSFETs

Abstract

An addressable matrix of 32 CMOS transistors was designed into a test chip to be flown on the Combined Release and Radiation Effects Satellite (CRRES). In this paper the matrix is described along with a SPICE-like parameter extraction procedure called JMOSFIT, and Cobalt 60 radiation test results are presented that illustrate the shift in the 21-MOSFET parameters derived from JMOSFIT.