NASA NTRS · 19900012583
A VLSI design for a systolic Viterbi decoder
Abstract
A systolic Viterbi decoder for convolutional codes is developed. This decoder uses the trace-back method to reduce the amount of data needed to be stored in registers. It is shown that this new algorithm requires a smaller chip size and achieves a faster decoding time than other existing methods.
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Truong, T. K., Satorius, E., Shih, M. T., Reed, I. S.. 1990-02-15. A VLSI design for a systolic Viterbi decoder. https://ntrs.nasa.gov/citations/19900012583
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