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NASA NTRS ยท 19910000574

Digital Phase-Locked Loop With Phase And Frequency Feedback

Abstract

Advanced design for digital phase-lock loop (DPLL) allows loop gains higher than those used in other designs. Divided into two major components: counterrotation processor and tracking processor. Notable features include use of both phase and rate-of-change-of-phase feedback instead of frequency feedback alone, normalized sine phase extractor, improved method for extracting measured phase, and improved method for "compressing" output rate.

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BibTeXRIS

Thomas, J. Brooks. 1991-11-01. Digital Phase-Locked Loop With Phase And Frequency Feedback. https://ntrs.nasa.gov/citations/19910000574

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