NASA NTRS · 19940004322
CCSDS Reed Solomon VLSI chip set
Abstract
A highly efficient error correcting code has been selected by NASA as a CCSDS standard: the 16 symbol error correcting Reed Solomon code. A VLSI implementation of this decoder is described in this paper. A total of 4 full custom VLSI chips are needed that correct data in real time at an sustained rate of up to 80 Mbits/second.
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Cameron, K., Whitaker, S., Liu, N., Liu, K., Canaris, J.. 1990-01-24. CCSDS Reed Solomon VLSI chip set. https://ntrs.nasa.gov/citations/19940004322
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