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NASA NTRS ยท 20060034020

3D Chip Scale Package (CSP)

Abstract

Package/die stacking technology enhances most aspects of electronic systems such as size, weight, speed, yield, and power consumption.

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BibTeXRIS

Ghaffarian, R.. 1999-01-01. 3D Chip Scale Package (CSP). https://ntrs.nasa.gov/citations/20060034020

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