NASA NTRS · 20060043518
Design and implementation of a structured LDPC decoder on FPGA
Abstract
We present a design framework for the implementation for a Low-Density Parity-Check (LDPC) decoders. We employed a scalable decoding architecture for a certain class of structured LDPC codes.
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Lee, Jason Kwok-San, Lee, Benjamin, Thorpe, Jeremy, Andrews, Kenneth, Dolinar, Sam, Hamkins, Jon. 2004-04-01. Design and implementation of a structured LDPC decoder on FPGA. https://ntrs.nasa.gov/citations/20060043518
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