An FPGA-based Doppler Processor for a Spaceborne Precipitation Radar

Durden, S. L.; Fischman, M. A.; Johnson, R. A.; Chu, A. J.; Jourdan, M. N.; Tanelli, S.

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NASA NTRS · 20080046994

An FPGA-based Doppler Processor for a Spaceborne Precipitation Radar

Durden, S. L.·Fischman, M. A.·Johnson, R. A.·Chu, A. J.·Jourdan, M. N.·Tanelli, S.

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Abstract

Measurement of precipitation Doppler velocity by spaceborne radar is complicated by the large velocity of the satellite platform. Even if successive pulses are well correlated, the velocity measurement may be biased if the precipitation target does not uniformly fill the radar footprint. It has been previously shown that the bias in such situations can be reduced if full spectral processing is used. The authors present a processor based on field-programmable gate array (FPGA) technology that can be used for spectral processing of data acquired by future spaceborne precipitation radars. The requirements for and design of the Doppler processor are addressed. Simulation and laboratory test results show that the processor can meet real-time constraints while easily fitting in a single FPGA.

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BibTeX RIS

Durden, S. L., Fischman, M. A., Johnson, R. A., Chu, A. J., Jourdan, M. N., Tanelli, S.. 2007-10-01. An FPGA-based Doppler Processor for a Spaceborne Precipitation Radar. https://ntrs.nasa.gov/citations/20080046994

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