Search NASA⌕ Search

NASA NTRS · 20160010288

TEM Analysis of Interfaces in Diffusion-Bonded Silicon Carbide Ceramics Joined Using Metallic Interlayers

Abstract

Silicon Carbide (SiC) is a promising material for thermo-structural applications due to its excellent high-temperature mechanical properties, oxidation resistance, and thermal stability. However, joining and integration technologies are indispensable for this material in order to fabricate large size and complex shape components with desired functionalities. Although diffusion bonding techniques using metallic interlayers have been commonly utilized to bond various SiC ceramics, detailed microstructural observation by Transmission Electron Microscopy (TEM) of the bonded area has not been carried out due to difficulty in preparing TEM samples. In this study, we tried to prepare TEM samples from joints of diffusion bonded SiC ceramics by Focused Ion Beam (FIB) system and carefully investigated the interfacial microstructure by TEM analysis. The samples used in this study were SiC fiber bonded ceramics (SA-Tyrannohex: SA-THX) diffusion bonded with metallic interlayers such as Ti, TiMo, and Mo-B. In this presentation, the result of microstructural analysis obtained by TEM observations and the influence of metallic interlayers and fiber orientation of SA-THX on the joint microstructure will be discussed.

Explore related subjects

Keep this discovery

Explore connections, maps & timelines

BibTeXRIS

Ozaki, T., Tsuda, H., Halbig, M. C., Singh, M., Hasegawa, Y., Mori, S., Asthana R.. 2016-01-26. TEM Analysis of Interfaces in Diffusion-Bonded Silicon Carbide Ceramics Joined Using Metallic Interlayers. https://ntrs.nasa.gov/citations/20160010288

Cite the original work for its findings. Save a collection to share your selection of sources.

KEEP EXPLORING

Related reports

Design and Simulation of Greatly Improved Future Generation 4H-SiC JFET-R Integrated Circuits for Prolonged 500 °C Operation

This work compares design layouts and circuit simulations of the next two prototype NASA Glenn SiC JFET-R IC fabrication runs designated “IC Gen. 12” and “IC Gen. 13”. Even though both generations employ the same physical JFET gate length and chip size, SPICE simulations predict drastic improvements to IC capabilities and performance metrics for Gen. 13 over Gen. 12. The main factors behind simulated performance differences are thinner n-channel layer leading to reduced operating voltages and switch to stepper-based photolithography that enables roughly 4-fold layout area reductions for functionally identical circuit blocks.

Silicon Carbide↗

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗