Mark I Silicon Carbide Integrated Circuit Test Oven Assembly and Programming Guide

David Spry; Stephanie Booth; Philip Neudeck

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NASA NTRS · 20230014821

Mark I Silicon Carbide Integrated Circuit Test Oven Assembly and Programming Guide

David Spry·Stephanie Booth·Philip Neudeck

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Abstract

This report provides a parts list, with assembly and programming instructions for building firstgeneration (Mark I) compact test ovens; this oven design is customized for prolonged functional electrical testing of prototype silicon carbide (SiC) devices at temperatures up to 500 °C (932 °F). The general approach of using multiple compact ovens to perform long-term, high-temperature electronics testing efficiently is described in a conference paper (Izadnegahdar, Alain, et al.: Alternative Setup for LongDuration Low-Duty-Cycle 600 °C Ambient Testing of SiC Integrated Circuits. International Microelectronics Assembly and Packaging Society (iMAPS) HiTECH 2021 Technology Crossover Extravaganza, 2021), available at https://ntrs.nasa.gov/citations/20210011676. The new Mark I oven design described here offers several significant improvements over the compact oven described in that paper. For example, it is constructed from commercial off-the-shelf (COTS) components and requires minimal assembly. Much of the work involves drilling holes in the two aluminum project boxes, which contain the control electronics and the oven itself. The cost of components is less than $200 (USD) per oven, which makes constructing multiple ovens affordable. In addition, the two-box design separates the high-temperature heater from the electronics, which keeps the electronics cool, prolonging the lifetime of these components.

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David Spry, Stephanie Booth, Philip Neudeck. 2024-03-01. Mark I Silicon Carbide Integrated Circuit Test Oven Assembly and Programming Guide. https://ntrs.nasa.gov/citations/20230014821

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