Fault Testing a Synthesizable Embedded Processor at Gate Level using FPGA Emulation.

Keep this discovery

Explore connections, maps & timelines

Mannos, Tom, Dziki, Brian, Sharif, Moslema. 2019-03-01. Fault Testing a Synthesizable Embedded Processor at Gate Level using FPGA Emulation.. https://doi.org/10.1145/3289602.3293931

Cite the original work for its findings. Save a collection to share your selection of sources.