DOE OSTI · 1782225
Marble v1.0
Abstract
The IP is a schematic of Marble, a dual low pin count FPGA Mezanine Card (LPC-FMC) carrier based on an Artix-7 in a FG484 package.
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Doolittle, Lawrence, Serrano Pareja, Carlos, Betz, Michael, Gaska, Michal, Kasprowicz, Grzegorz. 2019-11-05. Marble v1.0. https://www.osti.gov/biblio/1782225
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