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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 181 records · Page 10

Arbitrary Low-Dimensional Film Transfer Enabled by GeO 2 Release Layer

Low-dimensional materials show great promise for enhanced computing and sensing performance in mission-relevant environments. However, integrating low-dimensional materials into conventional electronics remains a challenge. Here, we demonstrate a novel transfer method by which low-dimensional materials and their heterostructures can be transferred onto any arbitrary substrate. Our method relies on a water soluble GeO 2 substrate from which lowdimensional materials are transferred without significant perturbation. We apply the method to transfer a working electronic device based on a low-dimensional material. Process developments are achieved to enable the fabrication and transfer of a working electronic device, including the growth of high-k dielectric on GeO 2 by atomic layer deposition and inserting an indium diffusion barrier into the device gate stack. This work supports Sandia’s heterogeneous integration strategy to broaden the implementation of low-dimensional films and their devices.

36 MATERIALS SCIENCE↗

Phonon- and defect-limited electron and hole mobility of diamond and cubic boron nitride: A critical comparison

Diamond and cBN are two of the most promising ultra-wide bandgap semiconductors for applications in high-power high-frequency electronic devices. Despite extensive studies on carrier transport in these materials, there are large discrepancies in their reported carrier mobilities. In this work, we investigate the phonon- and dopant-limited electron and hole mobilities of cBN and diamond with atomistic first-principles calculations in order to understand their fundamental upper bounds to carrier transport. Our results show that although the phonon-limited electron mobilities are comparable between cBN and diamond, the hole mobility is significantly lower in cBN due to its heavier hole effective mass. Moreover, although lattice scattering dominates the mobility at low doping, neutral impurity scattering becomes the dominant scattering mechanism at higher dopant concentrations due to the high dopant ionization energies. Our analysis provides critical insights and reveals the intrinsic upper limits to the carrier mobilities of diamond and cBN as a function of doping and temperature for applications in high-power electronic devices.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Pt/HTCC Alumina based Electronic Packaging System and Integration Processes for High Temperature Harsh Environment Applications

Electronic devices capable of operation at 500°C are required for long term Venus surface missions, as well as for in situ monitoring and control of next generation aeronautical engines. High temperature sensors and electronics can also find many applications in military, and energy and automobile industries. Various silicon carbide (SiC) sensors and electronic devices have been developed for operation at 500 °C, and a compatible packaging system is needed for long term test and deployment of these high temperature devices. High temperature co-fired ceramics (HTCC) alumina with platinum (Pt) conductor was proposed for high temperature electronic packaging. A prototype Pt/HTCC alumina packaging system including chip-level package and circuit board has been briefly reported previously for long-term electrical testing of SiC integrated circuits at 500 °C, and brief testing at much higher temperatures. HTCC alumina is an excellent dielectric material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. Pt is chemically noble and can be co-fired with HTCC alumina in air ambient producing a viable electronic packaging material system for high temperature applications. This paper presents a more detailed description of this packaging system including prototype low power packages and circuit boards based on HTCC alumina and Pt metallization for 500°C and other harsh environment applications. The key technical considerations for chip-level packaging and circuit board assembly, including materials and processes for 500 °C durable wire-bonding and SiC die attach, and integration of multi-chip circuit boards, are presented. Experimental test results of this packaging approach applied to SiC integrated circuits at 500 °C and 700°C are discussed as well.

High temperature↗

Pt/HTCC Alumina based Electronic Packaging System and Integration Processes for High Temperature Harsh Environment Applications

Electronic devices capable of operation at 500°C are required for long term Venus surface missions, as well as for in situ monitoring and control of next generation aeronautical engines. High temperature sensors and electronics can also find many applications in military, and energy and automobile industries. Various silicon carbide (SiC) sensors and electronic devices have been developed for operation at 500 °C, and a compatible packaging system is needed for long term test and deployment of these high temperature devices. High temperature co-fired ceramics (HTCC) alumina with platinum (Pt) conductor was proposed for high temperature electronic packaging. A prototype Pt/HTCC alumina packaging system including chip-level package and circuit board has been briefly reported previously for long-term electrical testing of SiC integrated circuits at 500 °C, and brief testing at much higher temperatures. HTCC alumina is an excellent dielectric material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. Pt is chemically noble and can be co-fired with HTCC alumina in air ambient producing a viable electronic packaging material system for high temperature applications. This paper presents a more detailed description of this packaging system including prototype low power packages and circuit boards based on HTCC alumina and Pt metallization for 500°C and other harsh environment applications. The key technical considerations for chip-level packaging and circuit board assembly, including materials and processes for 500 °C durable wire-bonding and SiC die attach, and integration of multi-chip circuit boards, are presented. Experimental test results of this packaging approach applied to SiC integrated circuits at 500 °C and 700°C are discussed as well.

electronic packaging↗

Tailored Graphene Micropatterns by Wafer-Scale Direct Transfer for Flexible Chemical Sensor Platform

2D materials, such as graphene, exhibit great potential as functional materials for numerous novel applications due to their excellent properties. The grafting of conventional micropatterning techniques on new types of electronic devices is required to fully utilize the unique nature of graphene. However, the conventional lithography and polymer-supported transfer methods often induce the contamination and damage of the graphene surface due to polymer residues and harsh wet-transfer conditions. In this work, a novel strategy to obtain micropatterned graphene on polymer substrates using a direct curing process is demonstrated. Employing this method, entirely flexible, transparent, well-defined self-activated graphene sensor arrays, capable of gas discrimination without external heating, are fabricated on 4 in. wafer-scale substrates. Finite element method simulations show the potential of this patterning technique to maximize the performance of the sensor devices when the active channels of the 2D material are suspended and nanoscaled. This study contributes considerably to the development of flexible functional electronic devices based on 2D materials.

2D materials, Graphene, Microscale patterning, Che↗

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire -bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500°C are reviewed.

High Temperature, Packaging, Alumina, Thick Film↗

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3 ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3 ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire - bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500oC are reviewed.

high temperature↗

Wide bandgap semiconductor materials and devices

The technological and societal impacts of electronic devices based on Ge, Si, and compound semiconductors like GaAs have been profound, fueling the decades long quest in identifying ever-larger bandgap semiconductors to untap new applications and possibilities. Specifically, an increase in the bandgap leads to shorter wavelength emission and an increased breakdown electric field, which has direct consequences for solid-state lighting like light-emitting diodes (LEDs) and laser diodes (LDs) from the visible (blue-green, blue, and violet) and beyond (UV and deep-UV) spectral range and for radically improved power devices supported by a higher intrinsic breakdown strength. Wide bandgap (WBG) semiconductors represent the frontier of materials that satisfy these criteria and include group IV, III–V, and II–VI material families like SiC (3.2 eV), GaN (3.4 eV), and ZnO (3.4 eV), respectively. With even larger bandgaps exceeding 4 eV, ultrawide bandgap (UWBG) semiconductors include diamond, III-nitrides incorporating Al and B (e.g., AlN, BN, and AlGaN), and sesquioxides like Ga 2 O 3 and (Al,Ga) 2 O 3 . These materials span widely varying stages of technological maturity, with SiC and GaN platforms among the most mature with commercially available devices in RF and high-power electronics, while other platforms such as Ga 2 O 3 rapidly advancing and poised to enable new UV and deep-UV optoelectronic devices. This Special Topic on Wide Bandgap Semiconductor Materials and Devices covers broad research subtopics on WBG and UWBG materials that span bulk crystals, epitaxy and substrate technologies, fundamental defect science, and doping, as well as electronic and optoelectronic device fabrication and characterization. Here, we highlight works from the collection, which we categorize by material platform of SiC, III-nitrides, and Ga 2 O 3 and related alloys.

36 MATERIALS SCIENCE↗

Tuning Phase Lock Loop Controller of Grid Following Inverters by Reinforcement Learning to Support Networked Microgrid Operations

The dynamic operation of networked microgrids leads to varying topological configurations and generator commitments and dispatches. These variations correspond to systems with different electrical characteristics. The fixed control gains of high-speed power electronic devices may result in undesirable system performance when the electrical characteristics change significantly. As such, it is necessary to tune the control gains of power electronics devices to adapt to the changing system characteristics. This paper uses observer-based reinforcement learning to automatically tune the proportional-integral (PI) gains of phase lock loop (PLL) controller of grid-following (GFL) inverters to adapt to the changing system strengths, that would be seen in networked microgrid operations. Simulation results using an operational electric distribution system, modeled as networked microgrids, are presented to demonstrate the need and effectiveness of the proposed adaptive controls.

networked microgrids, reinforcement learning, grid↗

Advanced Data Acquisition Systems with Self-Healing Circuitry

Kennedy Space Center's Spaceport Engineering & Technology Directorate has developed a data acquisition system that will help drive down the cost of ground launch operations. This system automates both the physical measurement set-up function as well as configuration management documentation. The key element of the system is a self-configuring, self-calibrating, signal-conditioning amplifier that automatically adapts to any sensor to which it is connected. This paper will describe the core technology behind this device and the automated data system in which it has been integrated. The paper will also describe the revolutionary enhancements that are planned for this innovative measurement technology. All measurement electronics devices contain circuitry that, if it fails or degrades, requires the unit to be replaced, adding to the cost of operations. Kennedy Space Center is now developing analog circuits that will be able to detect their own failure and dynamically reconfigure their circuitry to restore themselves to normal operation. This technology will have wide ranging application in all electronic devices used in space and ground systems.

Larson, William E.↗

GaAs Semi-Insulating Layer for a GaAs Device

Improved design for GaAs electronic device or integrated circuit designed to operate at cryogenic temperatures, customary SiO2 insulating layer replaced by semi-insulating layer of GaAs. Thermal expansions of device and covering layer therefore match closely, and thermal stresses caused by immersion in cryogenic chamber nearly eliminated.

Sherrill, G.↗

Gallium Oxide Heterojunction Diodes for 400 °C High‐Temperature Applications

β ‐Ga 2 O 3 ‐based semiconductor devices are expected to have significantly improved high‐power and high‐temperature performance due to its ultrawide bandgap of close to 5 eV. However, the high‐temperature operation of these ultrawide‐bandgap devices is usually limited by the relatively low 1–2 eV built‐in potential at the Schottky barrier with most high‐work‐function metals. Herein, heterojunction p ‐NiO/n‐ β ‐Ga 2 O 3 diodes fabrication and optimization for high‐temperature device applications are reported, demonstrating a current rectification ratio ( I ON / I OFF ) of more than 10 6 at 410 °C. The NiO heterojunction diode can achieve higher turn‐on ( V ON ) voltage and lower reverse leakage current compared to the Ni‐based Schottky diode fabricated on the same single‐crystal β ‐Ga 2 O 3 substrate, despite charge transport dominated by interfacial recombination. Electrical characterization and device modeling show that these advantages are due to a higher built‐in potential and additional band offset. These results suggest that heterojunction p–n diodes based on β ‐Ga 2 O 3 can significantly improve high‐temperature electronic device and sensor performance.

Sohel, Shahadat H.↗

Machine learning to accelerate screening for Marcus reorganization energies

Understanding and predicting the charge transport properties of π-conjugated materials is an important challenge for designing new organic electronic devices, such as solar cells, plastic transistors, light-emitting devices, and chemical sensors. A key component of the hopping mechanism of charge transfer in these materials is the Marcus reorganization energy which serves as an activation barrier to hole or electron transfer. While modern density functional methods have proven to accurately predict trends in intramolecular reorganization energy, such calculations are computationally expensive. In this work, we outline active machine learning methods to predict computed intramolecular reorganization energies of a wide range of polythiophenes and their use toward screening new compounds with low internal reorganization energies. Our models have an overall root mean square error (RMSE) of ±0.113 eV, but a much smaller RMSE of only ±0.036 eV on the new screening set. Since the larger error derives from high-reorganization energy compounds, the new method is highly effective to screen for compounds with potentially efficient charge transport parameters.

14 SOLAR ENERGY↗

Upper-Bound SEU Rates In Anisotropic Fluxes

Upper bounds on rates of single-event upsets (SEU's) in digital integrated circuits and other electronic devices exposed to anisotropic fluxes of energetic ionizing particles computed by use of improved method. Derived from simplified, worst-case mathematical models of charge-collecting volumes and physical phenomena in electronic devices.

Edmonds, Larry D.↗

Electronic Transport through Self Assembled Thiol Molecules: Effect of Monolayer Order, Dynamics and Temperature

We present the charge transport and tunneling conductance of self assembled organic thiol molecules and discuss the influence of order and dynamics in the monolayer on the transport behavior and the effect of temperature. Conjugated thiol molecular wires and organometals such as terpyridine metal complexes provide a new platform for molecular electronic devices and we study their self assembly on Au(111) substrates by the scanning tunneling microscope. Determining the organization of the molecule and the ability to control the nature of its interface with the substrate is important for reliable performance of the molecular electronic devices. By concurrent scanning tunneling microscopy and spectroscopy studies on SAMs formed from oligo (phenelyne ethynelyne) monolayers with and without molecular order, we show that packing and order determine the response of a self assembled monolayer (SAM) to competing interactions. Molecular resolution STM imaging in vacuum shows that the OPES adopt an imcommensurate SAM structure on Au(111) with a rectangular unit cell. Tunneling spectroscopic measurements were performed on the SAM as a function of junction resistance. STS results show that the I-Vs are non linear and asymmetric due to the inherent asymmetry in the molecular structure, with larger currents at negative sample biases. The asymmetry increases with increasing junction resistance due to the asymmetry in the coupling to the leads. This is brought out clearly in the differential conductance, which also shows a gap at the Fermi level. We also studied the effect of order and dynamics in the monolayer on the charge transport and found that competing forces between the electric field, intermolecular interactions, tip-molecule physisorption and substrate-molecule chemisorption impact the transport measurements and its reliability and that the presence of molecular order is very important for reproducible transport measurements. Thus while developing new electronic platforms based on molecules, it is important to have a good control of the molecule-substrate interface, for the devices to perform reliably. While such a control would minimize fluctuations and dynamics in the ensemble, the real challenge is to develop device architectures that are tolerant to fluctuations, since they cannot be totally eliminated in these low dimensional soft systems. Results of temperature dependent STS measurements will also be discussed.

Dholakia, Geetha↗

Electron and hole mobility of rutile GeO 2 from first principles: An ultrawide-bandgap semiconductor for power electronics

Rutile germanium dioxide (r-GeO 2 ) is a recently predicted ultrawide-bandgap semiconductor with potential applications in high-power electronic devices, for which the carrier mobility is an important material parameter that controls the device efficiency. We apply first-principles calculations based on density functional and density functional perturbation theory to investigate carrier-phonon coupling in r-GeO 2 and predict its phonon-limited electron and hole mobilities as a function of temperature and crystallographic orientation. The calculated carrier mobilities at 300 K are μ elec , ⊥ c → = 244 cm 2 V –1 s –1 , μ elec , ∥ c → = 377 cm 2 V –1 s –1 , μ hole , ⊥ c → = 27 cm 2 V –1 s –1 , and μ hole , ∥ c → = 29 cm 2 V –1 s –1 . At room temperature, carrier scattering is dominated by the low-frequency polar-optical phonon modes. The predicted Baliga figure of merit of n -type r-GeO 2 surpasses several incumbent semiconductors such as Si, SiC, GaN, and β -Ga 2 O 3 , demonstrating its superior performance in high-power electronic devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Carbon and carbon-coated electrodes for multistage depressed collectors for electron-beam devices - A technology review

Various aspects of carbon and carbon-coated multistaged depressed collector (MDC) electrode technology are reviewed. The physical properties of untreated graphite electrodes, ion-textured graphite electrodes, and textured, carbon-coated copper electrodes, and surface treatment procedures for these electrodes are described. The secondary electron emissions of the three electrode types are analyzed. MDC fabrication methods are discussed. The performances of MDCs fabricated with untreated graphite electrodes, ion-textured graphite electrodes, and textured, carbon-coated copper electrodes are evaluated. MDC and TWT efficiency levels for tubes fabricated with the three materials are measured.

Curren, Arthur N.↗