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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Reusable Verification Components for High-Energy Physics readout ASICs

Verification is a critical aspect of designing front-end (FE) readout ASICs for High-Energy Physics (HEP) experiments. These ASICs share several similar functional features, resulting in similar verification objectives, which can be addressed using comparable verification strategies. This contribution presents a set of re-usable verification components for addressing common verification tasks, such as clock generation, reset handling, configuration, as well as hit and fault injections. The components were developed as part of the CHIPS initiative and they have been successfully used in the verification of multiple HEP ASICs.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2020

An atlas of dynamic chromatin landscapes in mouse fetal development

The Encyclopedia of DNA Elements (ENCODE) project has established a genomic resource for mammalian development, profiling a diverse panel of mouse tissues at 8 developmental stages from 10.5 days after conception until birth, including transcriptomes, methylomes and chromatin states. Here we systematically examined the state and accessibility of chromatin in the developing mouse fetus. In total we performed 1,128 chromatin immunoprecipitation with sequencing (ChIP–seq) assays for histone modifications and 132 assay for transposase-accessible chromatin using sequencing (ATAC–seq) assays for chromatin accessibility across 72 distinct tissue-stages. We used integrative analysis to develop a unified set of chromatin state annotations, infer the identities of dynamic enhancers and key transcriptional regulators, and characterize the relationship between chromatin state and accessibility during developmental gene regulation. We also leveraged these data to link enhancers to putative target genes and demonstrate tissue-specific enrichments of sequence variants associated with disease in humans. The mouse ENCODE data sets provide a compendium of resources for biomedical researchers and achieve, to our knowledge, the most comprehensive view of chromatin dynamics during mammalian fetal development to date.

59 BASIC BIOLOGICAL SCIENCES↗
NASA NTRS1981

Fault-tolerant computer study

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

Rennels, D. A.↗
DOE OSTI2022

Runtime Systems for Energy Efficiency in Advanced Computing Systems

As heterogeneous systems become increasingly popular for both mobile and high-performance computing, conventional efficiency techniques such as dynamic voltage and frequency scaling (DVFS) fail to account for the tightly coupled and varied nature of systems on a chip (SoCs). In this work, we explore the impact of system unaware DVFS techniques on a mobile SoC under three benchmark suites: Chai, Rodinia, and Antutu. We then analyze performance trends across the suites to identify a set of consistent operating points that optimally balance power and performance across the system. The consistent operating points are then constructed into a dependency graph which can be leveraged to produce a more effective, SoC-wide governor.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1985

JMOSFET: A MOSFET parameter extractor with geometry-dependent terms

The parameters from metal-oxide-silicon field-effect transistors (MOSFETs) that are included on the Combined Release and Radiation Effects Satellite (CRRES) test chips need to be extracted to have a simple but comprehensive method that can be used in wafer acceptance, and to have a method that is sufficiently accurate that it can be used in integrated circuits. A set of MOSFET parameter extraction procedures that are directly linked to the MOSFET model equations and that facilitate the use of simple, direct curve-fitting techniques are developed. In addition, the major physical effects that affect MOSFET operation in the linear and saturation regions of operation for devices fabricated in 1.2 to 3.0 mm CMOS technology are included. The fitting procedures were designed to establish single values for such parameters as threshold voltage and transconductance and to provide for slope matching between the linear and saturation regions of the MOSFET output current-voltage curves. Four different sizes of transistors that cover a rectangular-shaped region of the channel length-width plane are analyzed.

Buehler, M. G.↗
NASA NTRS2014

Aeroflex Technology as Class-Y Demonstrator

Modern space field programmable gate array (FPGA) devices with increased functional density and operational frequency, such as Xilinx Virtex 4 (V4) and S (V5), are packaged in non-hermetic ceramic flip chip forms. These next generation space parts were not qualified to the MIL-PRF-38535 Qualified Manufacturer Listing (QML) class-V when they were released because class-V was only intended for hermetic parts. In order to bring Xilinx V5 type packages into the QML system, it was suggested that class-Y be set up as a new category. From 2010 through 2014, a JEDEC G12 task group developed screening and qualification requirements for Class-Y products. The Document Standardization Division of the Defense Logistics Agency (DLA) has completed an engineering practice study. In parallel with the class-Y efforts, the NASA Electronic Parts and Packaging (NEPP) program has funded JPL to study potential reliability issues of the class-Y products. The major hurdle of this task was the absence of adequate research samples. Figure 1-1 shows schematic diagrams of typical structures of class-Y type products. Typically, class-Y products are either in ceramic flip chip column grid array (CGA) or land grid array (LGA) form. In class-Y packages, underfill and heat spread adhesive materials are directly exposed to the spacecraft environment due to their non-hermeticity. One of the concerns originally raised was that the underfill material could degrade due to the spacecraft environment and negatively impact the reliability of the package. In order to study such issues, it was necessary to use ceramic daisy chain flip chip package samples so that continuity of flip chip solder bumps could be monitored during the reliability tests. However, none of the commercially available class-Y daisy chain parts had electrical connections through flip chip solder bumps; only solder columns were daisy chained, which made it impossible to test continuity of flip chip solder bumps without using extremely costly functional parts. Among space parts manufacturers who were interested in producing class-Y products, Aeroflex Microelectronic Solutions-HiRel had been developing assembly processes using their internal R&D classy type samples. In early 2012, JPL and Aeroflex initiated a collaboration to study reliability of the Aeroflex technology as a class-Y demonstrator.

Suh, Jong-ook↗
NASA NTRS1988

Noise-margin limitations on gallium-arsenide VLSI

Two factors which limit the complexity of GaAs MESFET VLSI circuits are considered. Power dissipation sets an upper complexity limit for a given logic circuit implementation and thermal design. Uniformity of device characteristics and the circuit configuration determines the electrical functional yield. Projection of VLSI complexity based on these factors indicates that logic chips of 15,000 gates are feasible with the most promising static circuits if a maximum power dissipation of 5 W per chip is assumed. While lower power per gate and therefore more gates per chip can be obtained by using a popular E/D FET circuit, yields are shown to be small when practical device parameter tolerances are applied. Further improvements in materials, devices, and circuits wil be needed to extend circuit complexity to the range currently dominated by silicon.

Long, Stephen I.↗
NASA NTRS1991

Analysis of the Intel 386 and i486 microprocessors for the Space Station Freedom Data Management System

The feasibility is analyzed of upgrading the Intel 386 microprocessor, which has been proposed as the baseline processor for the Space Station Freedom (SSF) Data Management System (DMS), to the more advanced i486 microprocessors. The items compared between the two processors include the instruction set architecture, power consumption, the MIL-STD-883C Class S (Space) qualification schedule, and performance. The advantages of the i486 over the 386 are (1) lower power consumption; and (2) higher floating point performance. The i486 on-chip cache does not have parity check or error detection and correction circuitry. The i486 with on-chip cache disabled, however, has lower integer performance than the 386 without cache, which is the current DMS design choice. Adding cache to the 386/386 DX memory hierachy appears to be the most beneficial change to the current DMS design at this time.

Liu, Yuan-Kwei↗
NASA NTRS1991

Analysis of the Intel 386 and i486 microprocessors for the Space Station Freedom Data Management System

The feasibility is analyzed of upgrading the Intel 386 microprocessor, which has been proposed as the baseline processor for the Space Station Freedom (SSF) Data Management System (DMS), to the more advanced i486 microprocessors. The items compared between the two processors include the instruction set architecture, power consumption, the MIL-STD-883C Class S (Space) qualification schedule, and performance. The advantages of the i486 over the 386 are (1) lower power consumption; and (2) higher floating point performance. The i486 on-chip cache does not have parity check or error detection and correction circuitry. The i486 with on-chip cache disabled, however, has lower integer performance than the 386 without cache, which is the current DMS design choice. Adding cache to the 386/387 DX memory hierarchy appears to be the most beneficial change to the current DMS design at this time.

Liu, Yuan-Kwei↗
NASA NTRS2019

NASA's Orbital Debris Optical Program: MCAT Operational on Ascension

The Orbital Debris Program Office at NASA Johnson Space Center has a long history of an optical observational program. The Meter Class Autonomous Telescope, MCAT, was dedicated to Eugene Stansbery (now also known as ES-MCAT) in 2017. MCAT, a 1.3m DFM telescope, has a proven capability for tracking known objects from Low-Earth Orbits (LEO) out to Geosynchronous (GEO) orbits. Monitoring the population of the GEO belt is accomplished through surveys. A GEO survey statistically samples the GEO belt (0 to ~15 deg orbital inclinations) to detect both correlated and uncorrelated targets. A GEO survey, the initial focus for MCAT, will commence in 2019 to map out the current state of the GEO population as input for the ORbital Debris Engineering Model (ORDEM 4.x). If a break-up occurs, surveys of the break-up field can be followed for discovery and investigations of daughter debris fragments from the parent satellite. Discovery can be accomplished by surveying orbits near to and including the parent object’s orbit. Targeted observations of debris can be taken with a suite of broadband filters for characterizing individual objects by rate-tracking their known or calculated orbital elements (Two-Line Element sets, TLEs). These observations can be used in conjunction with NASA’s Standard Satellite Break-up Model (SSBM). In 2018, MCAT’s primary mirror was realuminized with a high-end protected, enhanced silver ZeCoat and the CCD chip was replaced in the Spectral Instruments camera. With these updates completed, MCAT is now well on track to reach Full Operational Capability (FOC) in 2019 for its survey and rate-track capabilities. A full overview of MCAT’s operational state, capabilities, and mission will be discussed.

Orbital Debris Program↗
NASA NTRSDate not supplied

Wireless Sensor Instrumentation for Distributed Sensing in Ground-Test Facilities

Wireless sensors have a number of advantages over wired sensors for flexible or temporary diagnostic deployment in a field or lab setting. Relative to wireless alternatives, traditional wired systems encounter limitations including spatial and weight constraints, maintenance costs, and signal integrity in high-noise environments. Ground-test facilities often face these challenges and cause increase down-time costs and failure of data integrity. This paper describes the development and implementation of flexible wireless sensor boards for applications within ground-test facilities using different network architectures. These boards implement state-of-the- art STM32 microprocessor chips for high-speed data acquisition and computational power. Additionally, the design integrates long-range radio transceivers with power output of +20dBm, easily reaching 2 km range, while maintaining high interference immunity and minimizing current consumption. The wireless sensor boards were implemented to demonstrate performance through benchmark testing and by taking distributed electrically-isolated measurements on a high-voltage lab apparatus while using different network architectures. Although this test case is in a laboratory setting, this network architecture could be easily repurposed for various other forms of monitoring.

Wireless Sensor Network↗
DOE OSTI2025

Super-Resolution Ptychography with Small Segmented Detectors

To overcome the spatial resolution limit set by aperture-limited diffraction in traditional scanning transmission electron microscopy, microscopists have developed ptychography enabled by iterative phase retrieval algorithms and high-dynamic-range pixel array detectors. Current detector designs are limited by the data rate off chip, so a high-pixel-count detector has a proportionally lower frame rate than the few-segment detectors used for differential phase contrast (DPC) imaging. This slower acquisition speed leads to heightened vulnerability to scan noise, drift, and potential sample damage. This creates opportunities for repurposing fast segmented detectors for ptychography by trading a reduction in reciprocal space pixels for an increase in real space pixels. Here, we explore a strategy of oversampling in real space and instead apply detector pixel upsampling during the reconstruction process. Further, we demonstrate the viability of achieving super-resolution ptychography on thin objects using only 2 × 2 detector pixels, surpassing the resolution of integrated DPC (iDPC) imaging. With optimization using simulated datasets and experiments on MoTe 2 /WSe 2 bilayer moiré superlattices, we achieved super-resolution ptychography reconstructions under rapid acquisition conditions (37.5 pA, 1 μs dwell time), yielding over 50% improvements in contrast and information limit compared to annular dark field and iDPC imaging on the same detectors.

2D materials↗
NASA NTRS2008

Electronic Switch Arrays for Managing Microbattery Arrays

Integrated circuits have been invented for managing the charging and discharging of such advanced miniature energy-storage devices as planar arrays of microscopic energy-storage elements [typically, microscopic electrochemical cells (microbatteries) or microcapacitors]. The architecture of these circuits enables implementation of the following energy-management options: dynamic configuration of the elements of an array into a series or parallel combination of banks (subarrarys), each array comprising a series of parallel combination of elements; direct addressing of individual banks for charging/or discharging; and, disconnection of defective elements and corresponding reconfiguration of the rest of the array to utilize the remaining functional elements to obtain the desited voltage and current performance. An integrated circuit according to the invention consists partly of a planar array of field-effect transistors that function as switches for routing electric power among the energy-storage elements, the power source, and the load. To connect the energy-storage elements to the power source for charging, a specific subset of switches is closed; to connect the energy-storage elements to the load for discharging, a different specific set of switches is closed. Also included in the integrated circuit is circuitry for monitoring and controlling charging and discharging. The control and monitoring circuitry, the switching transistors, and interconnecting metal lines are laid out on the integrated-circuit chip in a pattern that registers with the array of energy-storage elements. There is a design option to either (1) fabricate the energy-storage elements in the corresponding locations on, and as an integral part of, this integrated circuit; or (2) following a flip-chip approach, fabricate the array of energy-storage elements on a separate integrated-circuit chip and then align and bond the two chips together.

Mojarradi, Mohammad↗
NASA NTRS1977

A miniature 48-channel pressure sensor module capable of in situ calibration

A new high data rate pressure sensor module with in situ calibration capability has been developed by the Langley Research Center to help reduce energy consumption in wind-tunnel facilities without loss of measurement accuracy. The sensor module allows for nearly a two order of magnitude increase in data rates over conventional electromechanically scanned pressure sampling techniques. This module consists of 16 solid state pressure sensor chips and signal multiplexing electronics integrally mounted to a four position pressure selector switch. One of the four positions of the pressure selector switch allows the in situ calibration of the 16 pressure sensors; the three other positions allow 48 channels (three sets of 16) pressure inputs to be measured by sensors. The small size of the sensor module will allow mounting within many wind-tunnel models, thus eliminating long tube lengths and their corresponding slow pressure response.

Gross, C.↗
NASA NTRS1978

Electronically scanned pressure sensor module with in SITU calibration capability

This high data rate pressure sensor module helps reduce energy consumption in wind tunnel facilities without loss of measurement accuracy. The sensor module allows for nearly a two order of magnitude increase in data rates over conventional electromechanically scanned pressure sampling techniques. The module consists of 16 solid state pressure sensor chips and signal multiplexing electronics integrally mounted to a four position pressure selector switch. One of the four positions of the pressure selector switch allows the in situ calibration of the 16 pressure sensors; the three other positions allow 48 channels (three sets of 16) pressure inputs to be measured by the sensors. The small size of the sensor module will allow mounting within many wind tunnel models, thus eliminating long tube lengths and their corresponding slow pressure response.

Gross, C.↗
NASA NTRS1978

C-MOS array design techniques

The entire complement of standard cells and components, except for the set-reset flip-flop, was completed. Two levels of checking were performed on each device. Logic cells and topological layout are described. All the related computer programs were coded and one level of debugging was completed. The logic for the test chip was modified and updated. This test chip served as the first test vehicle to exercise the standard cell complementary MOS(C-MOS) automatic artwork generation capability.

Feller, A.↗
NASA NTRS1990

Advanced modulation technology development for earth station demodulator applications. Coded modulation system development

A jointly optimized coded modulation system is described which was designed, built, and tested by COMSAT Laboratories for NASA LeRC which provides a bandwidth efficiency of 2 bits/s/Hz at an information rate of 160 Mbit/s. A high speed rate 8/9 encoder with a Viterbi decoder and an Octal PSK modem are used to achieve this. The BER performance is approximately 1 dB from the theoretically calculated value for this system at a BER of 5 E-7 under nominal conditions. The system operates in burst mode for downlink applications and tests have demonstrated very little degradation in performance with frequency and level offset. Unique word miss rate measurements were conducted which demonstrate reliable acquisition at low values of Eb/No. Codec self tests have verified the performance of this subsystem in a stand alone mode. The codec is capable of operation at a 200 Mbit/s information rate as demonstrated using a codec test set which introduces noise digitally. The measured performance is within 0.2 dB of the computer simulated predictions. A gate array implementation of the most time critical element of the high speed Viterbi decoder was completed. This gate array add-compare-select chip significantly reduces the power consumption and improves the manufacturability of the decoder. This chip has general application in the implementation of high speed Viterbi decoders.

Miller, Susan P.↗
DOE OSTI2020

Computational micromechanics model based failure criteria for chopped carbon fiber sheet molding compound composites

Chopped carbon fiber sheet molding compound has a great potential in lightweight automotive, marine, and aerospace applications. One of the most challenging tasks is to predict the failure strength of the material due to its anisotropy and heterogeneity, as well as complex stress states in real-world working conditions. In this work, a novel constitutive model of carbon fiber chip is proposed to capture the pre- and post-failure behaviors under different loading modes. On this basis, we propose a new computational micromechanics model, which is calibrated and validated by uniaxial tensile, compressive, and in-plane shear experiments. Furthermore, a set of microstructures representative volume element (RVE) models under complex loading conditions are reconstructed to understand the relationship between the microstructure characteristics and the failure envelopes. Finally, several modified versions of classical failure criteria are proposed for anisotropic materials with consideration of the fiber orientation tensor. The modified Tsai-Wu failure criterion, which shows the best accuracy among all failure criteria, is highlighted in the comparative study.

36 MATERIALS SCIENCE↗