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At least 199 records · Page 11

High density associative memory

A multi-layered, thin-film, digital memory having associative recall. There is a first memory matrix and a second memory matrix. Each memory matrix comprises, a first layer comprising a plurality of electrically separated row conductors; a second layer comprising a plurality of electrically separated column conductors intersecting but electrically separated from the row conductors; and, a plurality of resistance elements electrically connected between the row condutors and the column conductors at respective intersections of the row conductors and the column conductors, each resistance element comprising, in series, a first resistor of sufficiently high ohmage to conduct a sensible element current therethrough with virtually no heat-generating power consumption when a low voltage as employed in thin-film applications is applied thereacross and a second resistor of sufficiently high ohmage to conduct no sensible current therethrough when a low voltage as employed in thin-film applications is applied thereacross, the second resistor having the quality of breaking down to create a short therethrough upon the application of a breakdown level voltage across the first and second resistors.

Moopenn, Alexander W.↗

Some Improvements in Utilization of Flash Memory Devices

Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.

Gender, Thomas K.↗

Flash drive memory apparatus and method

A memory apparatus includes a non-volatile computer memory, a USB mass storage controller connected to the non-volatile computer memory, the USB mass storage controller including a daisy chain component, a male USB interface connected to the USB mass storage controller, and at least one other interface for a memory device, other than a USB interface, the at least one other interface being connected to the USB mass storage controller.

Hinchey, Michael G.↗

Modeling of Sonos Memory Cell Erase Cycle

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

Phillips, Thomas A.↗

SONOS Nonvolatile Memory Cell Programming Characteristics

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

MacLeod, Todd C.↗

Modeling of SONOS Memory Cell Erase Cycle

Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

Phillips, Thomas A.↗

Memory Circuit Fault Simulator

Spacecraft are known to experience significant memory part-related failures and problems, both pre- and postlaunch. These memory parts include both static and dynamic memories (SRAM and DRAM). These failures manifest themselves in a variety of ways, such as pattern-sensitive failures, timingsensitive failures, etc. Because of the mission critical nature memory devices play in spacecraft architecture and operation, understanding their failure modes is vital to successful mission operation. To support this need, a generic simulation tool that can model different data patterns in conjunction with variable write and read conditions was developed. This tool is a mathematical and graphical way to embed pattern, electrical, and physical information to perform what-if analysis as part of a root cause failure analysis effort.

Sheldon, Douglas J.↗

Error Characterization and Mitigation for 16Nm MLC NAND Flash Memory Under Total Ionizing Dose Effect

A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.

Li, Yue↗

Potential bio-medical and commercial applications of cold hibernated elastic memory (CHEM) self-deployable foam structures

A cold hibernated elastic memory (CHEM) foam structure is one of the most recent results of the quest for simple, reliable and low-cost expandable space structures. The CHEM technology utilizes shape memory polymers in open cellular (foam) structure or sandwich structures made of shape memory polymer foam cores and polymeric composite skins. It takes advantage of the polymer’s heat activated shape memory in addition to the foam’s elastic recovery to deploy a compacted structure. The glass transition temperature, Tg is tailored to rigidize the structure in the fully deployed configuration.

Sokolowski, Witold↗

Flash memory reliability NEPP 2008 task final report

This is the preliminary report which is based on the flash memory reliability studies conducted during the first year (2008) of the multi-year NEPP task. The report outlines the technology and reliability challenges for advanced flash memory technologies, summarizes the test results and analyses of reliability characterizations performed on the selected flash memory devices during 2008, and provides the preliminary thoughts on the risk mitigation approaches on using advanced flash memory technologies for space applications.

Chen, Yuan↗

NEPP non-volatile memory : FY09 summary report

This report documents the activities and results of the fiscal year 2009 (FY09) funding for the NASA Electronic Parts and Packaging (NEPP) program for non-volatile memory (NVM) devices. The FY09 task was divided into two main efforts: 1. Development of in-house measurement capability for flash devices 2. Reliability characterization of multi-level vs. single-level flash devices The FY09 NEPP Non Volatile Memory study was organized into these two sections in recognition of the continued and increasing importance of NVM to NASA. All NASA missions use NVM for boot code storage and some limited data archiving. Space-grade NVM has lagged commercial NVM development by many orders of magnitude, however. This gap in density only continues to increase as space-grade memories remain constant in the 1–16 Mbit levels, while commercial flash-based devices shrink in size and double in capacity every 18 months. Commercial flash devices are now at the 32 Gbit level, 10,000 times denser than current NASA NVM. This FY marks the beginning of a significant technological transition in NVM for NASA. The aggressive scaling of commercial NVMs has, as a by-product, made some of the flash devices radiation-tolerant enough to be at least considered for low-level radiation environment missions [Irom 2008]. This NEPP task is focused on understanding the reliability and potential future applications of such highly scaled flash memories.

Heidecker, Jason↗

Radiation tests of highly scaled high density commercial nonvolatile NAND flash memories update 2009

Heavy ion single-event measurements on a variety of high density commercial NAND flash memories are reported. Three single event effect (SEE) phenomena are examined: single effect upsets (SEUs), single event functional interrupts (SEFIs), and catastrophic loss of ability to erase and program the device. Also, radiation results of multilevel flash technology are compared with results from single-level flash technology. These commercial high density memories appear to be much less susceptible to SEE and have better TID response compared to older generations of flash memories. The single-level devices are less sensitive to SEUs than multi-level devices. The charge pump in this study survived up to 600 krads. A new high current phenomenon in high density NAND flash memories is also discussed.

Nguyen, Duc N.↗

Radiation Performance of Memory Technologies for Space Applications

MRAM and DRAM memory technologies identified for possible radiation hardening were investigated for memory-array- and controller-level radiation sensitivity. TID and SEE performance of memory arrays and associated cells is good, but with some questions about viability of hardening of problematic control circuitry. Control-circuitry-related SEE problems are highlighted. TID data are focused on memory arrays only.

Some, Raphael↗

Comparing Cumulative Flight Thermal Fatigue to Ground Test Results for Memory Components on the Mars Curiosity Rover

This paper explores the methods used to examine Mars Curiosity Rover’s flight temperature data to the Package Qualification and Verification (PQV) accelerated thermal cycle life test data in response to flight anomalies. The redundant Rover Compute Element (RCE-A, B) has experienced an inability to mount the flash memory several times. The leading cause of these anomalies is likely the loss of electrical connectivity, which is theorized to be due to cracks on the memory component solder joints by thermal cycle fatigue. To investigate this theory, the number of thermal cycles accumulated in flight was compared to PQV accelerated thermal cycle life test data. The goal of this study was to inform mission operations of the risk associated with thermal cycling damage on the RCE. However, since the RCE-B does not have continuous temperature data from the Platinum Resistance Thermometer (PRT) closest to the flash memory, a model was made to correlate continuous data from two other nearby sensors on the RCE-B to the noncontiguous sensor. Using the Rainflow Counting Algorithm, the reconstituted data was converted into the number of equivalent thermal cycles. The Coffin-Manson Equation was used to compare flight thermal cycles to the PQV test. The accelerated life test showed cracking on the memory component solder joints after 500 cycles of 80°C temperature excursions. This study found that the RCE-A and RCE-B have undergone an equivalent of 144 and 430 cycles of 80°C temperature excursions during flight, respectively.

Berger, Lindsey N↗

R-Hope: Development Approach to Extreme Non-volatile Memory Reuse Onboard the Curiosity Rover

The MSL Curiosity rover landed on Mars on August~5, 2012. Over time, one of its two computers experienced critical hardware memory failure. This non-volatile NAND flash memory held file system partitions and tunable parameters needed for running rover flight software. The project assembled a design and development team to re-purpose a NOR flash memory hardware chip, only 1.5\% of the size of the NAND, to hold the file systems and parameters. The usable NOR memory required major software changes to accommodate the new limitations of slower access speeds, vastly different physical layout, and smaller size. This presentation discusses the approach, challenges, and outcomes of restoring function to the computer so it can act as a ``lifeboat'' in event of problems with the primary computer.

Peper, Nick↗

Comparing Cumulative Flight Thermal Fatigue to Ground Test Results for Memory Components on the Mars Curiosity Rover

This paper explores the methods used to examine Mars Curiosity Rover’s flight temperature data in relation to the Package Qualification and Verification (PQV) accelerated thermal cycle life test data in response to flight anomalies. The redundant Rover Compute Element (RCE-A, B) has experienced an inability to mount the flash memory several times. The leading cause of these anomalies is likely the loss of electrical connectivity, which is theorized to be due to cracks on the memory component solder joints by thermal cycle fatigue. To investigate this theory, the number of thermal cycles accumulated in flight was compared to PQV accelerated thermal cycle life test data. The goal of this study was to inform mission operations of the risk associated with thermal cycling damage on the RCE. However, since the RCE-B does not have continuous temperature data from the Platinum Resistance Thermometer (PRT) closest to the flash memory, a model was made to correlate continuous data from two other nearby sensors on the RCE-B to the noncontiguous sensor. Using the Rainflow Counting Algorithm, the reconstituted data was converted into the number of equivalent thermal cycles. The Coffin-Manson Equation was used to compare flight thermal cycles to the PQV test. The accelerated life test showed cracking on the memory component solder joints after 500 cycles of 80°C temperature excursions. This study found that the RCE-A and RCE-B have undergone an equivalent of 144 and 430 cycles of 80°C temperature excursions during flight, respectively.

Bell, Charles↗

Medical applications of shape memory polymers

Shape memory polymers are described here and major advantages in some applications are identified over other medical materials such as shape memory alloys (SMA). A number of medical applications are anticipated for shape memory polymers. Some simple applications are already utilized in medical world, others are in examination process. Lately, several important applications are being considered for CHEM foams for self-deployable vascular and coronary devices. One of these potential applications, the endovascular treatment of aneurysm was experimentally investigated with encouraging results and is described in this paper as well.

cold hibernated elastic memory (CHEM)↗

Radiation Effects of Commercial Resistive Random Access Memories

We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

Random Access Memory (RAM)↗