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Results for “Semiconductor device fabrication”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
NASA NTRS2001

Fabrication of Very High Efficiency 5.8 GHz Power Amplifiers using AlGaN HFETs on SiC Substrates for Wireless Power Transmission

For wireless power transmission using microwave energy, very efficient conversion of the DC power into microwave power is extremely important. Class E amplifiers have the attractive feature that they can, in theory, be 100% efficient at converting, DC power to RF power. Aluminum gallium nitride (AlGaN) semiconductor material has many advantageous properties, relative to silicon (Si), gallium arsenide (GaAs), and silicon carbide (SiC), such as a much larger bandgap, and the ability to form AlGaN/GaN heterojunctions. The large bandgap of AlGaN also allows for device operation at higher temperatures than could be tolerated by a smaller bandgap transistor. This could reduce the cooling requirements. While it is unlikely that the AlGaN transistors in a 5.8 GHz class E amplifier can operate efficiently at temperatures in excess of 300 or 400 C, AlGaN based amplifiers could operate at temperatures that are higher than a GaAs or Si based amplifier could tolerate. Under this program, AlGaN microwave power HFETs have been fabricated and characterized. Hybrid class E amplifiers were designed and modeled. Unfortunately, within the time frame of this program, good quality HFETs were not available from either the RSC laboratories or commercially, and so the class E amplifiers were not constructed.

Sullivan, Gerry↗
NASA NTRS2009

Silicon Nanowire Growth at Chosen Positions and Orientations

It is now possible to grow silicon nanowires at chosen positions and orientations by a method that involves a combination of standard microfabrication processes. Because their positions and orientations can be chosen with unprecedented precision, the nanowires can be utilized as integral parts of individually electronically addressable devices in dense arrays. Nanowires made from silicon and perhaps other semiconductors hold substantial promise for integration into highly miniaturized sensors, field-effect transistors, optoelectronic devices, and other electronic devices. Like bulk semiconductors, inorganic semiconducting nanowires are characterized by electronic energy bandgaps that render them suitable as means of modulating or controlling electronic signals through electrostatic gating, in response to incident light, or in response to molecules of interest close to their surfaces. There is now potential for fabricating arrays of uniform, individually electronically addressable nanowires tailored to specific applications. The method involves formation of metal catalytic particles at the desired positions on a substrate, followed by heating the substrate in the presence of silane gas. The figure illustrates an example in which a substrate includes a silicon dioxide surface layer that has been etched into an array of pillars and the catalytic (in this case, gold) particles have been placed on the right-facing sides of the pillars. The catalytic thermal decomposition of the silane to silicon and hydrogen causes silicon columns (the desired nanowires) to grow outward from the originally catalyzed spots on the substrate, carrying the catalytic particles at their tips. Thus, the position and orientation of each silicon nanowire is determined by the position of its originally catalyzed spot on the substrate surface, and the orientation of the nanowire is perpendicular to the substrate surface at the originally catalyzed spot.

Getty, Stephanie A.↗
NASA NTRS1991

Silicon device performance measurements to support temperature range enhancement

Semiconductor power devices are typically rated for operation below 150 C. Little data is known for power semiconductors over 150 C. In most cases, the device is derated to zero operating power at 175 C. At the high temperature end of the temperature range, the intrinsic carrier concentration increases to equal the doping concentration level and the silicon behaves as an intrinsic semiconductor. The increase in intrinsic carrier concentration results in a shift of the Fermi level toward mid-bandgap at elevated temperatures. This produces a shift in devices characteristics as a function of temperature. By increasing the doping concentration higher operating temperatures can be achieved. This technique was used to fabricate low power analog and digital devices in silicon with junction operating temperatures in excess of 300 C. Additional temperature effects include increased p-n junction leakage with increasing temperature, resulting in increased resistivity. The temperature dependency of physical properties results in variations in device characteristics. These must be quantified and understood in order to develop extended temperature range operation.

Bromstead, James↗
NASA NTRS1997

Growth of Bulk Wide Bandgap Semiconductor Crystals and Their Potential Applications

Developments in bulk crystal growth research for electro-optical devices in the Center for Photonic Materials and Devices since its establishment have been reviewed. Purification processes and single crystal growth systems employing physical vapor transport and Bridgman methods were assembled and used to produce high purity and superior quality wide bandgap materials such as heavy metal halides and II-VI compound semiconductors. Comprehensive material characterization techniques have been employed to reveal the optical, electrical and thermodynamic properties of crystals, and the results were used to establish improved material processing procedures. Postgrowth treatments such as passivation, oxidation, chemical etching and metal contacting during the X-ray and gamma-ray device fabrication process have also been investigated and low noise threshold with improved energy resolution has been achieved.

Chen, Kuo-Tong↗
NASA NTRS1989

Monolithic narrow-linewidth InGaAsP semiconductor laser for coherent optical communications

A design for a monolithic narrow-linewidth InGaAsP diode laser has been developed using a multiple-quantum-well (MQW) extended-passive-cavity distributed-Bragg-reflector (DBR) laser design. Theoretical results indicate that this structure has the potential for a linewidth of 100 kHz or less. To realize this device, a number of the fabrication techniques required to integrate low-loss passive waveguides with active regions have been developed using a DBR laser structure. In addition, the MOCVD growth of InGaAs MQW laser structures has been developed, and threshold current densities as low as 1.6 kA/sq cm have been obtained from broad-stripe InGaAs/InGaAsP separate-confinement-heterostructure MQW lasers.

Palfrey, S. L.↗
NASA NTRSDate not supplied

On-Demand Manufacturing of Electronics

The On-Demand Manufacturing of Electronics (ODME) project develops materials, processes, and device designs to enable electronics, sensors, and semiconductors to be produced in microgravity environments. The demonstration of these technologies provides a pathway for space-based manufacturing of circuits, wearables, energy storage devices, and other electronics. This has facilitated the terrestrial production of devices including a wide range of sensors, printed batteries, and circuits that are additively manufactured using techniques available on the Advanced Toolplate System (ATS). Recent parabolic flight campaigns conducted with the ATS suggest that direct ink write (DIW) technology is suitable for depositing functional material inks in reduced gravity environments. The development of the Advanced Toolplate system also includes several other new tools, including miniaturized versions of the direct write head, fused filament fabrication head, micro-mill, component pick & place head, and two newly developed deposition technologies, the Electrohydrodynamic (EHD) inkjet head (for semiconductors), and the Electrodeposition head (for high performance circuits). These experiments are designed to compare processing and material behavior in zero gravity versus ground-based data for validation of microgravity advantages and de-risking of future orbital demonstrations of these technologies. The ability to conduct experiments in microgravity is a pivotal step in enabling electronic manufacturing technology in space for both terrestrial and deep space applications.

Cadre Francis↗
NASA NTRS1998

Diamond Analyzed by Secondary Electron Emission Spectroscopy

Diamond is a promising semiconductor material for novel electronic applications because of its chemical stability and inertness, heat conduction properties, and so-called negative electron affinity (NEA). When a surface has NEA, electrons generated inside the bulk of the material are able to come out into the vacuum without any potential barrier (work function). Such a material would have an extremely high secondary electron emission coefficient o, very high photoelectron (quantum) yield, and would probably be an efficient field emitter. Chemical-vapor-deposited (CVD) polycrystalline diamond films have even more advantages than diamond single crystals. Their fabrication is relatively easy and inexpensive, and they can be grown with high levels of doping--consequently, they can have relatively high conductivity. Because of these properties, diamond can be used for cold cathodes and photocathodes in high-power electronics and in high-frequency and high-temperature semiconductor devices.

Krainsky, Isay L.↗
NASA NTRS1996

InP-Based Ridge Waveguide Lasers for Wavelength Division Multiplexing Applications

Wavelength division multiplexed (WDM) systems place stringent requirements on the absolute wavelength and wavelength spacing of the elements in laser arrays. Ridge waveguides (RW) show excellent potential for practical implementation due to their simple fabrication with relaxed fabrication tolerances, high reliability and good performancce. An analysis of the fabrication tolerances for RW and buried heterostructure (BH) devices is performed, showing the advantages offered by the ridge design.

wavelength↗
NASA NTRS2011

Method for Providing Semiconductors Having Self-Aligned Ion Implant

A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide (SiC). This self-aligned nitrogen-implant allows for the realization of durable and stable electrical functionality of high temperature transistors such as JFETs. The method implements the self-aligned nitrogen-implant having predetermined dimensions, at a particular step in the fabrication process, so that the SiC junction field effect transistors are capable of being electrically operating continuously at 500.degree. C. for over 10,000 hours in an air ambient with less than a 10% change in operational transistor parameters.

Neudeck, Philip G.↗
NASA NTRS2014

Method for Providing Semiconductors Having Self-Aligned Ion Implant

A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide (SiC). This self-aligned nitrogen-implant allows for the realization of durable and stable electrical functionality of high temperature transistors such as JFETs. The method implements the self-aligned nitrogen-implant having predetermined dimensions, at a particular step in the fabrication process, so that the SiC junction field effect transistors are capable of being electrically operating continuously at 500.degree. C. for over 10,000 hours in an air ambient with less than a 10% change in operational transistor parameters.

Neudeck, Philip G.↗
NASA NTRS1998

MEMS Applications in Aerodynamic Measurement Technology

Microelectromechanical systems (MEMS) embodies the integration of sensors, actuators, and electronics on a single substrate using integrated circuit fabrication techniques and compatible bulk and surface micromachining processes. Silicon and its derivatives form the material base for the MEMS technology. MEMS devices, including microsensors and microactuators, are attractive because they can be made small (characteristic dimension about 100 microns), be produced in large numbers with uniform performance, include electronics for high performance and sophisticated functionality, and be inexpensive. For aerodynamic measurements, it is preferred that sensors be small so as to approximate measurement at a point, and in fact, MEMS pressure sensors, wall shear-stress sensors, heat flux sensors and micromachined hot wires are nearing application. For the envisioned application to wind tunnel models, MEMS sensors can be placed on the surface or in very shallow grooves. MEMS devices have often been fabricated on stiff, flat silicon substrates, about 0.5 mm thick, and therefore were not easily mounted on curved surfaces. However, flexible substrates are now available and heat-flux sensor arrays have been wrapped around a curved turbine blade. Electrical leads can also be built into the flexible substrate. Thus MEMS instrumented wind tunnel models do not require deep spanwise grooves for tubes and leads that compromise the strength of conventionally instrumented models. With MEMS, even the electrical leads can potentially be eliminated if telemetry of the signals to an appropriate receiver can be implemented. While semiconductor silicon is well known for its electronic properties, it is also an excellent mechanical material for MEMS applications. However, silicon electronics are limited to operations below about 200 C, and silicon's mechanical properties start to diminish above 400 C. In recent years, silicon carbide (SiC) has emerged as the leading material candidate for applications in high temperature environments and can be used for high-temperature MEMS applications. With SiC, diodes and more complex electronics have been shown to operate to about 600 C, while the mechanical properties of SiC are maintained to much higher temperatures. Even when MEMS devices show benefits in the laboratory, there are many packaging challenges for any aeronautics application. Incorporating MEMS into these applications requires new approaches to packaging that goes beyond traditional integrated circuit (IC) packaging technologies. MEMS must interact mechanically, as well as electrically with their environment, making most traditional chip packaging and mounting techniques inadequate. Wind tunnels operate over wide temperature ranges in an environment that is far from being a 'clean-room.' In flight, aircraft are exposed to natural elements (e.g. rain, sun, ice, insects and dirt) and operational interferences(e.g. cleaning and deicing fluids, and maintenance crews). In propulsion systems applications, MEMS devices will have to operate in environments containing gases with very high temperatures, abrasive particles and combustion products. Hence deployment and packaging that maintains the integrity of the MEMS system is crucial. This paper presents an overview of MEMS fabrication and materials, descriptions of available sensors with more details on those being developed in our laboratories, and a discussion of sensor deployment options for wind tunnel and flight applications.

Reshotko, E.↗
NASA NTRS2004

Quantification Of 4H- To 3C-Polymorphism In Silicon Carbide (SiC) Epilayers And An Investigation Of Recombination-Enhanced Dislocation Motion In SiC By Optical Emission Microscopy (Oem) Techniques

Environments that impose operational constraints on conventional silicon-(Si) based semiconductor devices frequently appear in military- and space-grade applications. These constraints include high temperature, high power, and high radiation environments. Silicon carbide (SiC), an alternative type of semiconductor material, has received abundant research attention in the past few years, owing to its radiation-hardened properties as well as its capability to withstand high temperatures and power levels. However, the growth and manufacture of SiC devices is still comparatively immature, and there are severe limitations in present crystal growth and device fabrication processes. Among these limitations is a variety of crystal imperfections known as defects. These imperfections can be point defects (e.g., vacancies and interstitials), line defects (e.g., edge and screw dislocations), or planar defects (e.g., stacking faults and double-positioning boundaries). All of these defects have been experimentally shown to be detrimental to the performance of electron devices made from SiC. As such, it is imperative that these defects are significantly reduced in order for SiC devices to become a viable entity in the electronics world. The NASA Glenn High Temperature Integrated Electronics & Sensors Team (HTIES) is working to identify and eliminate these defects in SiC by implementing improved epitaxial crystal growth procedures. HTIES takes two-inch SiC wafers and etches patterns, producing thousands of mesas into each wafer. Crystal growth is then carried out on top of these mesas in an effort to produce films of improved quality-resulting in electron devices that demonstrate superior performance-as well as fabrication processes that are cost-effective, reliable, and reproducible. In this work, further steps are taken to automate HTIES' SiC wafer inspection system. National Instruments LabVIEW image processing and pattern recognition routines are developed that are capable of quantifying and mapping defects on both the substrate and mesa surfaces, and of quantifying polymorphic changes in the grown materials. In addition, an optical emission microscopy (OEM) system is developed that will facilitate comprehensive study of recombination-enhanced dislocation motion (REDM).

Speer, Kevin M.↗
NASA NTRS1978

Semiconductor heterostructure

A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

Hovel, Harold John↗
NASA NTRS1979

Semiconductor structure

A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

Hovel, Harold J.↗
NASA NTRS1989

Monolithically integrated two-dimensional arrays of optoelectronic threshold devices for neural network applications

A monolithic 10 x 10 two-dimensional array of 'optical neuron' optoelectronic threshold elements for neural network applications has been designed, fabricated, and tested. Overall array dimensions are 5 x 5 mm, while the individual neurons, composed of an LED that is driven by a double-heterojunction bipolar transistor, are 250 x 250 microns. The overall integrated structure exhibited semiconductor-controlled rectifier characteristics, with a breakover voltage of 75 V and a reverse-breakdown voltage of 60 V; this is attributable to the parasitic p-n-p transistor which exists as a result of the sharing of the same n-AlGaAs collector between the transistors and the LED.

Kim, J. H.↗
NASA NTRS2005

Fabrication of 3-D Photonic Band Gap Crystals Via Colloidal Self-Assembly

The behavior of photons in a Photonic Crystals, PCs, is like that of electrons in a semiconductor in that, it prohibits light propagation over a band of frequencies, called Photonic Band Gap, PBG. Photons cannot exist in these band gaps like the forbidden bands of electrons. Thus, PCs lend themselves as potential candidates for devices based on the gap phenomenon. The popular research on PCs stem from their ability to confine light with minimal losses. Large scale 3-D PCs with a PBG in the visible or near infra red region will make optical transistors and sharp bent optical fibers. Efforts are directed to use PCs for information processing and it is not long before we can have optical integrated circuits in the place of electronic ones.

Subramaniam, Girija↗
NASA NTRS1979

The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

Bouldin, D. L.↗
NASA NTRS1992

A new fabrication technique for back-to-back varactor diodes

A new varactor diode process has been developed in which much of the processing is done from the back of an extremely thin semiconductor wafer laminated to a low-dielectric substrate. Back-to-back BNN diodes were fabricated with this technique; excellent DC and low-frequency capacitance measurements were obtained. Advantages of the new technique relative to other techniques include greatly reduced frontside wafer damage from exposure to process chemicals, improved capability to integrate devices (e.g. for antenna patterns, transmission lines, or wafer-scale grids), and higher line yield. BNN diodes fabricated with this technique exhibit approximately the expected capacitance-voltage characteristics while showing leakage currents under 10 mA at voltages three times that needed to deplete the varactor. This leakage is many orders of magnitude better than comparable Schottky diodes.

Smith, R. Peter↗