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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11

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NASA NTRS1982

Design and evaluation of a fault-tolerant multiprocessor using hardware recovery blocks

A fault-tolerant multiprocessor with a rollback recovery mechanism is discussed. The rollback mechanism is based on the hardware recovery block which is a hardware equivalent to the software recovery block. The hardware recovery block is constructed by consecutive state-save operations and several state-save units in every processor and memory module. When a fault is detected, the multiprocessor reconfigures itself to replace the faulty component and then the process originally assigned to the faulty component retreats to one of the previously saved states in order to resume fault-free execution. A mathematical model is proposed to calculate both the coverage of multi-step rollback recovery and the risk of restart. A performance evaluation in terms of task execution time is also presented.

Lee, Y. H.↗

NASA NTRS1983

A fast, programmable hardware architecture for spaceborne SAR processing

The launch of spaceborne SARs during the 1980's is discussed. The satellite SARs require high quality and high throughput ground processors. Compression ratios in range and azimuth of greater than 500 and 150 respectively lead to frequency domain processing and data computation rates in excess of 2000 million real operations per second for C-band SARs under consideration. Various hardware architectures are examined and two promising candidates and proceeds to recommend a fast, programmable hardware architecture for spaceborne SAR processing are selected. Modularity and programmability are introduced as desirable attributes for the purpose of HTSP hardware selection.

Bennett, J. R.↗

NASA NTRS1982

Solar array Shuttle flight experiment - Hardware development and testing

This paper reports on the fabrication and ground testing of (a) a large area, light-weight, flexible substrate developmental solar array wing that has been built for NASA-MSFC and of (b) the supporting structure and data acquisition system (DAS) which, with the wing, will be flown in the Shuttle as an experiment in 1984. The experiment will verify the dynamics, thermodynamic, and electrical performance predictions of the array wing and will demonstrate the structural capability of the array wing for Orbiter launch and re-entry environments. The experiment hardware verification program was designed to minimize costs and risk of experiment performance degradation while maintaining Shuttle and crew safety. The previous full-scale wing hardware tests included an extension mast water table test and wing testing for random vibration, thermal vacuum, and acoustic environments. The results of these tests were used to define wing design modifications and to scope the test program for the experiment hardware.

Elms, R. V.↗

NASA NTRS1985

Hardware test program for evaluation of baseline range/range rate sensor concept

The Hardware Test Program for evaluation of the baseline range/range rate sensor concept was initiated 11 September 1984. This ninth report covers the period 12 May through 11 June 1885. A contract amendment adding a second phase has extended the Hardware Test Program through 10 December 1985. The objective of the added program phase is to establish range and range measurement accuracy and radar signature characteristics for a typical spacecraft target. Phase I of the Hardware Test Program was designed to reduce the risks associated with the Range/Range Rate (R/R) Sensor baseline design approach. These risks are associated with achieving the sensor performance required for the two modes of operation, the Interrupted CW (ICW) mode for initial acquisition and tracking to close-in ranges, and the CW mode, providing coverage during the final docking maneuver. The risks associated with these modes of operation have to do with the realization of adequate sensitivity to operate to their individual maximum ranges.

Source record↗

NASA NTRS1984

Hardware schemes for fast Fourier transform, part 7.4A

Real-time fast fourier transformer (FFT) processing of a MST radar data and cost-effective approaches to hardware FFT generation were studied. Previously devised hardware FFT configurations are described including the estimated number of chips used and the time required to perform a 1024-point FFT. The remaining entries in the table correspond to original designs, which presuppose the availability of a microcomputer and a modestly complicated hardware peripheral. These original designs, all of which implement a radix-4 FFT with twiddle factors, are assigned model numbers to make them easier to refer to.

Stitt, G. R.↗

NASA NTRS1987

Access flight hardware design and development

Several items were found to be of immense value in the design and development of the Assembly Concept for Construction of Erectable Space Structures (ACCESS) hardware. The early availability of mock-up and engineering test hardware helped to develop the concept and prove the feasibility of the experiment. The extensive neutral buoyancy testing was invaluable in developing the procedures and timelines, proving that the hardware functioned as intended, and effectively trained the astronauts. The early involvement of the crew systems/astronaut personnel was extremely beneficial in shaping the design to meet the EVA compatibility requirements. Also, the early definition of coupled loads and on-orbit dynamic responses can not be overemphasized due to the relative uncertainty in the magnitude of these loads and their impact on the design.

Rogers, John F.↗

NASA NTRS1987

Electronic hardware implementations of neutral networks

This paper examines some of the present work on the development of electronic neural network hardware. In particular, the investigations currently under way at JPL on neural network hardware implementations based on custom VLSI technology, novel thin film materials, and an analog-digital hybrid architecture are reviewed. The availability of such hardware will greatly benefit and enhance the present intense research effort on the potential computational capabilities of highly parallel systems based on neural network models.

Thakoor, A. P.↗

NASA NTRS1988

Hardware realization of a baseband processor for a SS-FDMA/TDMA/DAMA system

Hardware implementation of the NASA ACTS baseband processor is described which achieves the system message data handling performance required to perform satellite switching of high-rate baseband data. The hardware meets payload specifications for size, weight, and power. Hardware redundancy applied to critical paths in several functional areas insures that the reliability and life expectancy requirements are fulfilled. The remote reprogrammability of the processor message data handling and routing functions provides system flexibility for dynamic reconfiguration during rapidly changing traffic loads.

Moat, Richard L.↗

NASA NTRS1988

Hardware development for the surface tension driven convection experiment aboard the USML-1 spacelab mission

The Surface Tension Driven Convection Experiment is a Space Transportation System flight experiment to study both transient and steady thermocapillary fluid flows aboard the USML-1 Spacelab mission planned for March 1992. Hardware is under development to establish the experimental conditions and perform the specified measurements, for both ground based research and the flight experiment in a Spacelab single rack. Major development areas include an infrared thermal imaging system for surface temperature measurement, a CO2 laser and control system for surface heating, and for flow visualization, a He-Ne laser and optical system in conjunction with an intensified video camera. For ground based work the components of each system were purchased or designed, and tested individually. The three systems will be interfaced with the balance of the experimental hardware and will constitute a working engineering model. A description of the three systems and examples of the component performance is given along with the plans for the development of flight hardware.

Pline, A. D.↗

NASA NTRS1988

Transmission delays in hardware clock synchronization

Various methods, both with software and hardware, have been proposed to synchronize a set of physical clocks in a system. Software methods are very flexible and economical but suffer an excessive time overhead, whereas hardware methods require no time overhead but are unable to handle transmission delays in clock signals. The effects of nonzero transmission delays in synchronization have been studied extensively in the communication area in the absence of malicious or Byzantine faults. The authors show that it is easy to incorporate the ideas from the communication area into the existing hardware clock synchronization algorithms to take into account the presence of both malicious faults and nonzero transmission delays.

Shin, Kang G.↗

NASA NTRS1989

Hardware development for the Surface Tension Driven Convection Experiment aboard the USML-1 Spacelab mission

Pline, A. D.↗

NASA NTRS1989

Distributed execution of recovery blocks - An approach for uniform treatment of hardware and software faults in real-time applications

The concept of distributed execution of recovery blocks is examined as an approach for uniform treatment of hardware and software faults. A useful characteristic of the approach is the relatively small time cost it requires. The approach is thus suitable for incorporation into real-time computer systems. A specific formulation of the approach that is aimed at minimizing the recovery time is presented, called the distributed recovery block (DRB) scheme. The DRB scheme is capable of effecting forward recovery while handling both hardware and software faults in a uniform manner. An approach to incorporating the capability for multiprocessing scheme is also discussed. Two experiments aimed at testing the execution efficiency of the scheme in real-time applications have been conducted on two different multimicrocomputer networks. The results clearly indicate the feasibility of achieving tolerance of hardware and software faults in a broad range of real-time computer systems by use of the schemes for distributed execution of recovery blocks.

Kim, K. H.↗

NASA NTRS1989

The JPL telerobot operator control station. Part 1: Hardware

The Operator Control Station of the Jet Propulsion Laboratory (JPL)/NASA Telerobot Demonstrator System provides the man-machine interface between the operator and the system. It provides all the hardware and software for accepting human input for the direct and indirect (supervised) manipulation of the robot arms and tools for task execution. Hardware and software are also provided for the display and feedback of information and control data for the operator's consumption and interaction with the task being executed. The hardware design, system architecture, and its integration and interface with the rest of the Telerobot Demonstrator System are discussed.

Kan, Edwin P.↗

NASA NTRS1989

The Initial Blood Storage Experiment - The spaceflight hardware program

The Initial Blood Storage Experiment (IBSE) was conceived to investigate the effects of microgravity on the formed elements of human blood. The experiment flew on the January 1986, 61-C mission of the Space Shuttle Columbia. The experiment hardware was designed to provide a closely controlled temperature and air flow environment for all blood samples. During the mission, two IBSE modules were on board the orbiter and an identical set of hardware and blood samples were maintained on earth as a control. This paper describes the development and performance of the IBSE hardware which was converted from a conceptual design to an on-orbit, man-rated, mid-deck locker experiment in 17 months.

Almgren, David W.↗

NASA NTRS1991

A summary of existing and planned experiment hardware for low-gravity fluids research

An overview is presented of (1) existing ground-based, low gravity research facilities, with examples of hardware capabilities, and (2) existing and planned space-based research facilities, with examples of current and past flight hardware. Low-gravity, ground-based facilities, such as drop towers and aircraft, provide the experimenter with quick turnaround time, easy access to equipment, gravity levels ranging from 10(exp -2) to 10(exp -6) G, and low-gravity durations ranging from 2 to 30 sec. Currently, the only operational space-based facility is the Space Shuttle. The Shuttle's payload bay and middeck facilities are described. Existing and planned low-gravity fluids research facilities are also described with examples of experiments and hardware capabilities.

Hill, Myron E.↗

NASA NTRS1991

Management of a CFD organization in support of space hardware development

The management strategy of NASA-Marshall's CFD branch in support of space hardware development and code validation implements various elements of total quality management. The strategy encompasses (1) a teaming strategy which focuses on the most pertinent problem, (2) quick-turnaround analysis, (3) the evaluation of retrofittable design options through sensitivity analysis, and (4) coordination between the chief engineer and the hardware contractors. Advanced-technology concepts are being addressed via the definition of technology-development projects whose products are transferable to hardware programs and the integration of research activities with industry, government agencies, and universities, on the basis of the 'consortium' concept.

Schutzenhofer, L. A.↗

NASA NTRS1992

Extravehicular activity compatibility evaluation of developmental hardware for assembly and repair of precision reflectors

This report presents results of tests performed in neutral buoyancy by two pressure-suited test subjects to simulate Extravehicular Activity (EVA) tasks associated with the on-orbit construction and repair of a precision reflector spacecraft. Two complete neutral buoyancy assemblies of the test article (tetrahedral truss with three attached reflector panels) were performed. Truss joint hardware, two different panel attachment hardware concepts, and a panel replacement tool were evaluated. The test subjects found the operation and size of the truss joint hardware to be acceptable. Both panel attachment concepts were found to be EVA compatible, although one concept was judged by the test subjects to be considerably easier to operate. The average time to install a panel from a position within arm's reach of the test subjects was 1 min 14 sec. The panel replacement tool was used successfully to demonstrate the removal and replacement of a damaged reflector panel in 10 min 25 sec.

Heard, Walter L., Jr.↗

NASA NTRS1989

Space biology initiative program definition review. Trade study 3: Hardware miniaturization versus cost

The optimum hardware miniaturization level with the lowest cost impact for space biology hardware was determined. Space biology hardware and/or components/subassemblies/assemblies which are the most likely candidates for application of miniaturization are to be defined and relative cost impacts of such miniaturization are to be analyzed. A mathematical or statistical analysis method with the capability to support development of parametric cost analysis impacts for levels of production design miniaturization are provided.

Jackson, L. Neal↗