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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS2014

Method of Forming Textured Silicon Substrate by Maskless Cryogenic Etching

Disclosed herein is a textured substrate comprising a base comprising silicon, the base having a plurality of needle like structures depending away from the base, wherein at least one of the needle like structures has a depth of greater than or equal to about 50 micrometers determined perpendicular to the base, and wherein at least one of the needle like structures has a width of less than or equal to about 50 micrometers determined parallel to the base. An anode and a lithium ion battery comprising the textured substrate, and a method of producing the textured substrate are also disclosed.

Yee, Karl Y.↗
NASA NTRS2017

Results of All Polyimide, Etched Foil Heater Qualification and Failure Limit Testing

Standard FEP (Fluorinated Ethylene Propylene resin) polyimide (SFP) or Kapton film heaters—which have a long history of space flight—are output-power limited by the melting point of Teflon which is used as an adhesive and insulator between the encasing layers of Kapton. The limit is expressed as a power density or through maximum operating temperature limits. All-polyimide (AP) heaters (also known as adhesive-less heaters) do not contain FEP Teflon between the layers of Kapton so the heaters are unconstrained by the melting point of Teflon. Thus, AP heaters have a higher maximum power density and operating temperature. AP heaters have not been qualified or flown on JPL missions but could be useful in applications that require a higher power density (Watt density) than the SFP heaters can support. The purpose of this paper is to document the qualification and property testing of the AP heaters for flight purposes. JPL (Jet Propulsion Lab.) tested several varieties of all-polyimide heaters to determine their functional equivalence to the standard heater which has substantial flight heritage and to determine their maximum limits. Tests included standard in-air burn-in tests, maximum power testing, lead pull strength, process qualification verification (PQV), long duration thermal cycling, and electro-magnetic compatibility shielding properties for copper-cladded shielded heaters. The results show that the all-polyimide heater appears to be functionally equivalent to the standard heater and has a higher Watt density and maximum operating temperature limit. The tests, test articles, failure analysis of the test articles, and results are described herein. These test results indicate that the all-polyimide heater is ready for flight applications.

Cucullu, Gordon C., III↗
NASA NTRSDate not supplied

HF Vapor Etching for Stardust Particle Extraction: A Progress Report

The Stardust mission captured thousands of particles from Jupiter-family comet 81P/Wild 2 using aluminum foil and silica aerogel collection media [1]. Most studies of Wild 2 material examine refractory terminal particles >1 μm in diameter which are extracted individually from the ends of tracks produced by the particle’s impact into the aerogel medium. A substantial (>65 %) mass fraction of the impactors is present as fine-grained (i.e. <1 μm) material in the ‘bulb’ and walls of the tracks, which may contain preserved organic material and presolar grains [2]. Few presolar grains have been identified in Stardust samples, which has been interpreted as owing to destruction upon impact into the foils and preferential sampling of terminal particles rather than a lack of presolar grains in Wild 2 samples [3-5]. By isolating the fine-grained material from these bulbs and performing microbeam and isotopic analyses (i.e., scanning electron microscopy and NanoSIMS), organic matter and presolar grains can be identified and constraints can be placed on the constituents of primitive outer solar system materials.

Stardust↗
NASA NTRS2004

A New Process for Fabricating Random Silicon Nanotips

An improved process for the fabrication of random arrays of silicon nanotips has been demonstrated to be feasible. Relative to other such processes, this process offers advantages of low cost and simplicity. Moreover, this process can readily be combined with other processes used to fabricate integrated circuits and other monolithic silicon structures. Arrays of silicon nanotips are subjects of research and development efforts directed toward utilizing them as field emitters in flat-panel displays, vacuum microelectronics, and microwave devices. Other silicon-nanotip-fabrication processes developed thus far predominantly include lithography, etching, and/or elaborate deposition steps followed by oxide sharpening steps and are both process intensive as well as expensive. In addition to being cheaper and simpler, the present process can efficiently produce silicon nanotips that range in height from a few microns to several tens of microns and are distributed over large areas. The process mentioned here can be summarized as consisting of (1) the growth of micro-etch masks on a silicon substrate, followed by (2) etching away of the masks, along with some of the substrate, to make an array of sharp tips. In the first step of the process, a cleaned silicon substrate is subjected to reactive ion etching (RIE) in a certain mixture of oxygen and carbon tetrafluoride under radio-frequency excitation. This process step results in the growth of fluorine based compounds in the form of stumps randomly distributed on the substrate. These stumps are known in the art as polymer RIE grass. The dimensions of these stumps are of the order of hundreds of nanometers, the exact values depending on process time and gas composition. The areal density of the stumps decreases with increasing process time as they grow and merge with neighboring stumps. These stumps constitute the micro-etch masks for the next step of the process. In the second step of the process, the substrate covered with the microetch masks is subjected to deep reactive ion etching (DRIE) process, which consists of cycles of reactive ion etching alternating with passivation (the Bosch process). The gas used in the etching substeps is sulfur hexafluoride (SF6); the gas used in the passivation substeps is octafluorocyclobutane (C4F8). The portions of the substrate directly under the RIE grass stubs are etched more slowly than are the portions between the stubs. Hence, what remains at the end of the process, after the stubs and parts of the substrate have been etched away, are silicon spikes where the stubs were (see figure). In a variation of the process, one starts with a silicon or silicon-on-insulator substrate with the intent to etch through the full thickness of the substrate. That is to say, one chooses the thickness so that the DRIE step releases individual nanotips. Such individual silicon nanotips may have utility as microscopic probes in biomedical applications.

Manohara, Harish↗
NASA NTRS2013

Fabrication Methods for Adaptive Deformable Mirrors

Previously, it was difficult to fabricate deformable mirrors made by piezoelectric actuators. This is because numerous actuators need to be precisely assembled to control the surface shape of the mirror. Two approaches have been developed. Both approaches begin by depositing a stack of piezoelectric films and electrodes over a silicon wafer substrate. In the first approach, the silicon wafer is removed initially by plasmabased reactive ion etching (RIE), and non-plasma dry etching with xenon difluoride (XeF2). In the second approach, the actuator film stack is immersed in a liquid such as deionized water. The adhesion between the actuator film stack and the substrate is relatively weak. Simply by seeping liquid between the film and the substrate, the actuator film stack is gently released from the substrate. The deformable mirror contains multiple piezoelectric membrane layers as well as multiple electrode layers (some are patterned and some are unpatterned). At the piezolectric layer, polyvinylidene fluoride (PVDF), or its co-polymer, poly(vinylidene fluoride trifluoroethylene P(VDF-TrFE) is used. The surface of the mirror is coated with a reflective coating. The actuator film stack is fabricated on silicon, or silicon on insulator (SOI) substrate, by repeatedly spin-coating the PVDF or P(VDFTrFE) solution and patterned metal (electrode) deposition. In the first approach, the actuator film stack is prepared on SOI substrate. Then, the thick silicon (typically 500-micron thick and called handle silicon) of the SOI wafer is etched by a deep reactive ion etching process tool (SF6-based plasma etching). This deep RIE stops at the middle SiO2 layer. The middle SiO2 layer is etched by either HF-based wet etching or dry plasma etch. The thin silicon layer (generally called a device layer) of SOI is removed by XeF2 dry etch. This XeF2 etch is very gentle and extremely selective, so the released mirror membrane is not damaged. It is possible to replace SOI with silicon substrate, but this will require tighter DRIE process control as well as generally longer and less efficient XeF2 etch. In the second approach, the actuator film stack is first constructed on a silicon wafer. It helps to use a polyimide intermediate layer such as Kapton because the adhesion between the polyimide and silicon is generally weak. A mirror mount ring is attached by using adhesive. Then, the assembly is partially submerged in liquid water. The water tends to seep between the actuator film stack and silicon substrate. As a result, the actuator membrane can be gently released from the silicon substrate. The actuator membrane is very flat because it is fixed to the mirror mount prior to the release. Deformable mirrors require extremely good surface optical quality. In the technology described here, the deformable mirror is fabricated on pristine substrates such as prime-grade silicon wafers. The deformable mirror is released by selectively removing the substrate. Therefore, the released deformable mirror surface replicates the optical quality of the underlying pristine substrate.

Toda, Risaku↗
NASA NTRS1975

Metallographic examination of TD-nickel base alloys

Techniques are evaluated for chemical, electrochemical, and thermal etching of thoria dispersed (TD) nickel alloys. An electrochemical etch is described which yielded good results only for large grain sizes of TD-nickel. Two types of thermal etches are assessed for TD-nickel: an oxidation etch and vacuum annealing of a polished specimen to produce an etch. It is shown that the first etch was somewhat dependent on sample orientation with respect to the processing direction, the second technique was not sensitive to specimen orientation or grain size, and neither method appear to alter the innate grain structure when the materials were fully annealed prior to etching. An electrochemical etch is described which was used to observe the microstructures in TD-NiCr, and a thermal-oxidation etch is shown to produce better detail of grain boundaries and to have excellent etching behavior over the entire range of grain sizes of the sample.

Kane, R. D.↗
NASA NTRS1990

Photoelectrochemical fabrication of spectroscopic diffraction gratings, phase 2

This program was directed toward the production of Echelle diffraction gratings by a light-driven, electrochemical etching technique (photoelectrochemical etching). Etching is carried out in single crystal materials, and the differential rate of etching of the different crystallographic planes used to define the groove profiles. Etching of V-groove profiles was first discovered by us during the first phase of this project, which was initially conceived as a general exploration of photoelectrochemical etching techniques for grating fabrication. This highly controllable V-groove etching process was considered to be of high significance for producing low pitch Echelles, and provided the basis for a more extensive Phase 2 investigation.

Rauh, R. David↗
NASA NTRS1999

Feature Profile Evolution of SiO2 Trenches In Fluorocarbon Plasmas

Etching of silicon microstructures for semiconductor manufacturing in chlorine plasmas has been well characterized. The etching proceeds in a two-part process, where the chlorine neutrals passivate the Si surface and then the ions etch away SiClx. However, etching in more complicated gas mixtures and materials, such as etching of SiO2 in Ar/C4F8, requires knowledge of the ion and neutral distribution functions as a function of angle and velocity, in addition to modeling the gas surface reactions. In order to address these needs, we have developed and integrated a suite of models to simulate the etching process from the plasma reactor level to the feature profile evolution level. This arrangement allows for a better understanding, control, and prediction of the influence of equipment level process parameters on feature profile evolution. We are currently using the HPEM (Hybrid Plasma Equipment Model) and PCMCM (Plasma Chemistry Monte Carlo Model) to generate plasma properties and ion and neutral distribution functions for argon/fluorocarbon discharges in a GEC Reference Cell. These quantities are then input to the feature scale model, Simulation of Profile Evolution by Level Sets (SPELS). A surface chemistry model is used to determine the interaction of the incoming species with the substrate material and simulate the evolution of the trench profile. The impact of change of gas pressure and inductive power on the relative flux of CFx and F to the wafer, the etch and polymerization rates, and feature profiles will be examined. Comparisons to experimental profiles will also be presented.

Hwang, Helen↗
NASA NTRS2004

Web Growth Used to Confine Screw Dislocations to Predetermined Lateral Positions in 4H-SiC Epilayers

Silicon-carbide- (SiC-) based power devices could enable substantial aerospace electronics benefits over today's silicon-based electronics. However, present-day SiC wafers contain electrically harmful dislocations (including micropipes) that are unpredictably distributed in high densities across all commercial 4H- and 6H-SiC wafers. The NASA Glenn Research Center recently demonstrated a crystal growth process that moves SiC wafer dislocations to predetermined lateral positions in epitaxial layers so that they can be reproducibly avoided during subsequent SiC electronic device fabrication. The process starts by reactive ion etching mesa patterns with enclosed trench regions into commercial on-axis (0001) 4H- or 6H-SiC substrates. An example of a pregrowth mesa geometry with six enclosed triangular-shaped trench regions is shown. After the etch mask is stripped, homoepitaxial growth is carried out in pure stepflow conditions that enable thin cantilevers to grow laterally from the tops of mesas whose pregrowth top surfaces are not threaded by substrate screw dislocations. The image in the bottom figure shows the postgrowth structure that forms after the lateral cantilevers expand to coalesce and completely roof over each of the six triangular trench regions. Atomic force microscope (AFM) measurements of the roof revealed that three elementary screw dislocation growth spirals, each shown in the AFM insets of the bottom image on the previous page, formed in the film roof at three respective points of cantilever film coalescence. The image above shows the structure following an etch in molten potassium hydroxide (KOH) that produced surface etch pits at the dislocation defects. The larger KOH etch pits--S1, S2, and S3--shown in this image correspond to screw dislocations relocated to the final points of cantilever coalescence. The smaller KOH etch pits are consistent with epilayer threading edge dislocations from the pregrowth substrate mesa (P1, P3, and P4) and a final cantilever coalescence point (P2). No defects (i.e., no etch pits) are observed in other cantilevered portions of the film surface. On the basis of the principle of dislocation Burgers vector conservation, we hypothesize that all vertically propagating substrate dislocations in an enclosed trench region become combined into a single dislocation in the webbed film roof at the point of final roof coalescence. The point of final roof coalescence, and therefore the lateral location of a webbed roof dislocation, can be designed into the pregrowth mesa pattern. Screw dislocations with predetermined lateral positions can then be used to provide the new growth steps necessary for growing a 4H/6H-SiC epilayer with a lower dislocation density than the substrate. Devices fabricated on top of such films can be positioned to avoid the preplaced dislocations.

Powell, J. Anthony↗
NASA NTRS1978

Ion beam sputtering of fluoropolymers

Etching and deposition of fluoropolymers are of considerable industrial interest for applications dealing with adhesion, chemical inertness, hydrophobicity, and dielectric properties. This paper describes ion beam sputter processing rates as well as pertinent characteristics of etched targets and films. An argon ion beam source was used to sputter etch and deposit the fluoropolymers PTFE, FEP, and CTFE. Ion beam energy, current density, and target temperature were varied to examine effects on etch and deposition rates. The ion etched fluoropolymers yield cone or spire-like surface structures which vary depending upon the type of polymer, ion beam power density, etch time, and target temperature. Also presented are sputter target and film characteristics which were documented by spectral transmittance measurements, X-ray diffraction, ESCA, and SEM photomicrographs.

Sovey, J. S.↗
NASA NTRS1994

Development of microchannel plate x-ray optics

The goal of this research program was to develop a novel technique for focusing x-rays based on the optical system of a lobster's eye. A lobster eye employs many closely packed reflecting surfaces arranged within a spherical or cylindrical shell. These optics have two unique properties: they have unlimited fields of view and can be manufactured via replication of identical structures. Because the angular resolution is given by the ratio of the size of the individual optical elements to the focal length, optical elements with sizes on the order of one hundred microns are required to achieve good angular resolution with a compact telescope. We employed anisotropic etching of single crystal silicon wafers for the fabrication of micron-scale optical elements. This technique, commonly referred to as silicon micromachining, is based on silicon fabrication techniques developed by the microelectronics industry. An anisotropic etchant is a chemical which etches certain silicon crystal planes much more rapidly than others. Using wafers in which the slowly etched crystal planes are aligned perpendicularly to the wafer surface, it is possible to etch a pattern completely through a wafer with very little distortion. Our optics consist of rectangular pores etched completely through group of zone axes (110) oriented silicon wafers. The larger surfaces of the pores (the mirror elements) were aligned with the group of zone axes (111) planes of the crystal perpendicular to the wafer surface. We have succeeded in producing silicon lenses with a geometry suitable for 1-d focusing x-ray optics. These lenses have an aspect ratio (40:1) suitable for x-ray reflection and have very good optical surface alignment. We have developed a number of process refinements which improved the quality of the lens geometry and the repeatability of the etch process. A significant progress was made in obtaining good optical surface quality. The RMS roughness was decreased from 110 A for our initial lenses to 30 A in the final lenses. A further factor of three improvement in surface quality is required for the production of efficient x-ray optics. In addition to the silicon fabrication, an x-ray beam line was constructed at Columbia for testing the optics.

Kaaret, Philip↗
NASA NTRS2005

Structures Self-Assembled Through Directional Solidification

Nanotechnology has created a demand for new fabrication methods with an emphasis on simple, low-cost techniques. Directional solidification of eutectics (DSE) is an unconventional approach in comparison to low-temperature biomimetic approaches. A technical challenge for DSE is producing microstructural architectures on the nanometer scale. In both processes, the driving force is the minimization of Gibb's free energy. Selfassembly by biomimetic approaches depends on weak interaction forces between organic molecules to define the architectural structure. The architectural structure for solidification depends on strong chemical bonding between atoms. Constituents partition into atomic-level arrangements at the liquid-solid interface to form polyphase structures, and this atomic-level arrangement at the liquid-solid interface is controlled by atomic diffusion and total undercooling due to composition (diffusion), kinetics, and curvature of the boundary phases. Judicious selection of the materials system and control of the total undercooling are the keys to producing structures on the nanometer scale. The silicon-titanium silicide (Si-TiSi2) eutectic forms a rod structure under isothermal cooling conditions. At the NASA Glenn Research Center, directional solidification was employed along with a thermal gradient to promote uniform rods oriented with the thermal gradient. The preceding photomicrograph shows the typical transverse microstructure of a solidified Si-TiSi2 eutectic composition. The dark and light gray regions are Si and TiSi2, respectively. Preferred rod orientation along the thermal gradient was poor. The ordered TiSi2 rods have a narrow distribution in diameter of 2 to 3 m, as shown. The rod diameter showed a weak dependence on process conditions. Anisotropic etch behavior between different phases provides the opportunity to fabricate structures with high aspect ratios. The photomicrographs show the resulting microstructure after a wet chemical etch and a dry plasma etch. The wet chemical etches the silicon away, exposing the TiSi2 rods, whereas plasma etching preferentially etches the Si-TiSi2 interface to form a crater. The porous architectures are applicable to fabricating microdevices or creating templates for part fabrication. The porous rod structure can serve as a platform for fabricating microplasma devices for propulsion or microheat exchangers and for fabricating microfilters for miniatured chemical reactors. Although more work is required, self-assembly from DSE can have a role in microdevice fabrication.

Dynys, Frederick W.↗
NASA NTRS2003

Artifacts for Calibration of Submicron Width Measurements

Artifacts that are fabricated with the help of molecular-beam epitaxy (MBE) are undergoing development for use as dimensional calibration standards with submicron widths. Such standards are needed for calibrating instruments (principally, scanning electron microscopes and scanning probe microscopes) for measuring the widths of features in advanced integrated circuits. Dimensional calibration standards fabricated by an older process that involves lithography and etching of trenches in (110) surfaces of single-crystal silicon are generally reproducible to within dimensional tolerances of about 15 nm. It is anticipated that when the artifacts of the present type are fully developed, their critical dimensions will be reproducible to within 1 nm. These artifacts are expected to find increasing use in the semiconductor-device and integrated- circuit industries as the width tolerances on semiconductor devices shrink to a few nanometers during the next few years. Unlike in the older process, one does not rely on lithography and etching to define the critical dimensions. Instead, one relies on the inherent smoothness and flatness of MBE layers deposited under controlled conditions and defines the critical dimensions as the thicknesses of such layers. An artifact of the present type is fabricated in two stages (see figure): In the first stage, a multilayer epitaxial wafer is grown on a very flat substrate. In the second stage, the wafer is cleaved to expose the layers, then the exposed layers are differentially etched (taking advantage of large differences between the etch rates of the different epitaxial layer materials). The resulting structure includes narrow and well-defined trenches and a shelf with thicknesses determined by the thicknesses of the epitaxial layers from which they were etched. Eventually, it should be possible to add a third fabrication stage in which durable, electronically inert artifacts could be replicated in diamondlike carbon from a master made by MBE and etching as described above.

Grunthaner, Frank↗
NASA NTRS2003

Wafer-Level Membrane-Transfer Process for Fabricating MEMS

A process for transferring an entire wafer-level micromachined silicon structure for mating with and bonding to another such structure has been devised. This process is intended especially for use in wafer-level integration of microelectromechanical systems (MEMS) that have been fabricated on dissimilar substrates. Unlike in some older membrane-transfer processes, there is no use of wax or epoxy during transfer. In this process, the substrate of a wafer-level structure to be transferred serves as a carrier, and is etched away once the transfer has been completed. Another important feature of this process is that two electrodes constitutes an electrostatic actuator array. An SOI wafer and a silicon wafer (see Figure 1) are used as the carrier and electrode wafers, respectively. After oxidation, both wafers are patterned and etched to define a corrugation profile and electrode array, respectively. The polysilicon layer is deposited on the SOI wafer. The carrier wafer is bonded to the electrode wafer by using evaporated indium bumps. The piston pressure of 4 kPa is applied at 156 C in a vacuum chamber to provide hermetic sealing. The substrate of the SOI wafer is etched in a 25 weight percent TMAH bath at 80 C. The exposed buried oxide is then removed by using 49 percent HF droplets after an oxygen plasma ashing. The SOI top silicon layer is etched away by using an SF6 plasma to define the corrugation profile, followed by the HF droplet etching of the remaining oxide. The SF6 plasma with a shadow mask selectively etches the polysilicon membrane, if the transferred membrane structure needs to be patterned. Electrostatic actuators with various electrode gaps have been fabricated by this transfer technique. The gap between the transferred membrane and electrode substrate is very uniform ( 0.1 m across a wafer diameter of 100 mm, provided by optimizing the bonding control). Figure 2 depicts the finished product.

Yang, Eui-Hyeok↗