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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS2009

Radiation tests of highly scaled high density commercial nonvolatile NAND flash memories update 2009

Heavy ion single-event measurements on a variety of high density commercial NAND flash memories are reported. Three single event effect (SEE) phenomena are examined: single effect upsets (SEUs), single event functional interrupts (SEFIs), and catastrophic loss of ability to erase and program the device. Also, radiation results of multilevel flash technology are compared with results from single-level flash technology. These commercial high density memories appear to be much less susceptible to SEE and have better TID response compared to older generations of flash memories. The single-level devices are less sensitive to SEUs than multi-level devices. The charge pump in this study survived up to 600 krads. A new high current phenomenon in high density NAND flash memories is also discussed.

Nguyen, Duc N.↗
NASA NTRS2008

Effects of Palladium Content, Quaternary Alloying, and Thermomechanical Processing on the Behavior of Ni-Ti-Pd Shape Memory Alloys for Actuator Applications

The need for compact, solid-state actuation systems for use in the aerospace, automotive, and other transportation industries is currently driving research in high-temperature shape memory alloys (HTSMA) having transformation temperatures above 100 C. One of the basic high temperature systems under investigation to fill this need is NiTiPd. Prior work on this alloy system has focused on phase transformations and respective temperatures, no-load shape memory behavior (strain recovery), and tensile behavior for selected alloys. In addition, a few tests have been done to determine the effect of boron additions and thermomechanical treatment on the aforementioned properties. The main properties that affect the performance of a solid state actuator, namely work output, transformation strain, and permanent deformation during thermal cycling under load have mainly been neglected. There is also no consistent data representing the mechanical behavior of this alloy system over a broad range of compositions. For this thesis, ternary NiTiPd alloys containing 15 to 46 at.% palladium were processed and the transformation temperatures, basic tensile properties, and work characteristics determined. However, testing reveals that at higher levels of alloying addition, the benefit of increased transformation temperature begins to be offset by lowered work output and permanent deformation or "walking" of the alloy during thermal cycling under load. In response to this dilemma, NiTiPd alloys have been further alloyed with gold, platinum, and hafnium additions to solid solution strengthen the martensite and parent austenite phases in order to improve the thermomechanical behavior of these materials. The tensile properties, work behavior, and dimensional stability during repeated thermal cycling under load for the ternary and quaternary alloys were compared and discussed. In addition, the benefits of more advanced thermomechanical processing or training on the dimensional stability of these alloys during repeated actuation were investigated. Finally, the effect of quaternary alloying on the thermal stability of NiTiPdX alloys is determined via thermal cycling of the materials to increasing temperatures under load. It was found that solid solution additions of platinum and gold resulted in about a 30 C increase in upper use temperature compared to the baseline NiTiPd alloy, providing an added measure of over-temperature protection.

Bigelow, Glen↗
NASA NTRS1982

On nonlinear finite element analysis in single-, multi- and parallel-processors

Numerical solution of nonlinear equilibrium problems of structures by means of Newton-Raphson type iterations is reviewed. Each step of the iteration is shown to correspond to the solution of a linear problem, therefore the feasibility of the finite element method for nonlinear analysis is established. Organization and flow of data for various types of digital computers, such as single-processor/single-level memory, single-processor/two-level-memory, vector-processor/two-level-memory, and parallel-processors, with and without sub-structuring (i.e. partitioning) are given. The effect of the relative costs of computation, memory and data transfer on substructuring is shown. The idea of assigning comparable size substructures to parallel processors is exploited. Under Cholesky type factorization schemes, the efficiency of parallel processing is shown to decrease due to the occasional shared data, just as that due to the shared facilities.

Utku, S.↗
NASA NTRS1987

Performance of FORTRAN floating-point operations on the Flex/32 multicomputer

A series of experiments has been run to examine the floating-point performance of FORTRAN programs on the Flex/32 (Trademark) computer. The experiments are described, and the timing results are presented. The time required to execute a floating-point operation is found to vary considerbaly depending on a number of factors. One factor of particular interest from an algorithm design standpoint is the difference in speed between common memory accesses and local memory accesses. Common memory accesses were found to be slower, and guidelines are given for determinig when it may be cost effective to copy data from common to local memory.

Crockett, Thomas W.↗
NASA NTRS1996

Analysis of space radiation data of semiconductor memories

This article presents an analysis of radiation effects for several select device types and technologies aboard the Combined Release and Radiation Effects Satellite (CRRES) satellite. These space-flight measurements covered a period of about 14 months of mission lifetime. Single Event Upset (SEU) data of the investigated devices from the Microelectronics Package (MEP) were processed and analyzed. Valid upset measurements were determined by correcting for invalid readings, hard failures, missing data tapes (thus voids in data), and periods over which devices were disabled from interrogation. The basic resolution time of the measurement system was confirmed to be 2 s. Lessons learned, important findings, and recommendations are presented.

Flight Experiment↗
NASA NTRS2008

Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?

Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.

LaBel, Kenneth A.↗
NASA NTRS2008

Characterization of a New Phase and Its Effect on the Work Characteristics of a Near-Stoichiometric Ni30Pt20Ti50 High-Temperature Shape Memory Alloy (HTSMA)

A new phase observed in a nominal Ni30Pt20Ti50 (at.%) high temperature shape memory alloy has been characterized using transmission electron microscopy and 3-D atom probe tomography. This phase forms homogeneously in the B2 austenite matrix by a nucleation and growth mechanism and results in a concomitant increase in the martensitic transformation temperature of the base alloy. Although the structure of this phase typically contains a high density of faults making characterization difficult, it appears to be trigonal (-3m point group) with a(sub o) approx. 1.28 nm and c(sub o) approx. 1.4 nm. Precipitation of this phase increases the microhardness of the alloy substantially over that of the solution treated and quenched single-phase material. The effect of precipitation strengthening on the work characteristics of the alloy has been explored through load-biased strain-temperature testing in the solution-treated condition and after aging at 500 C for times ranging from 1 to 256 hours. Work output was found to increase in the aged alloy as a result of an increase in transformation strain, but was not very sensitive to aging time. The amount of permanent deformation that occurred during thermal cycling under load was small but increased with increasing aging time and stress. Nevertheless, the dimensional stability of the alloy at short aging times (1-4 hours) was still very good making it a potentially useful material for high-temperature actuator applications.

Garg, A.↗
NASA NTRS2003

In-Flight Observations of Long-Term Single Event Effect(SEE)Performance on Orbview-2 and Xray Timing Explorer(XTE)Solid State Recorders (SSR)

This paper presents Single Event Effect (SEE) in-flight data on Solid State Recorders (SSR) that have been collected over a long period of time for two NASA spacecraft: Orbview-2 and XTE. SEE flight data on solid-state memories give an opportunity to study the behavior in space of SEE sensitive commercial devices. The actual Single Event Upset (SEU) rates can be compared with the calculated rates based on environment models and ground test data. The SEE mitigation schemes can also be evaluated in actual implementation. A significant amount of data has already been published concerning observed SEE effects on memories in space. However, most of the data presented cover either a short period of time or a small number of devices. The data presented here has been collected on a large number of devices during several years. This allows statistically significant information about the effect of space weather fluctuations on SEU rates, and the effectiveness of SEE countermeasures used to be analyzed. Only Orbview-2 data is presented in this summary. XTE data will be included in the final paper.

Poivey, Christian↗
NASA NTRS2007

Effects of Stoichiometry on Transformation Temperatures and Actuator-Type Performance of NiTiPd and NiTiPdX High-Temperature Shape Memory Alloys

High-temperature shape memory NiTiPd and NiTiPdX (X=Au, Pt, Hf) alloys were produced with titanium equivalent (Ti+Hf) compositions of 50.5, 50.0, 49.5, and 49.0 at.%. Thermo-mechanical testing in compression was used to evaluate the transformation temperatures, transformation strain, work output, and permanent deformation behavior of each alloy to study the effects of quaternary alloying and stoichiometry on high-temperature shape memory alloy behavior. Microstructural evaluation showed the presence of second phases for all alloy compositions. No load transformation temperatures in the stoichiometric alloys were relatively unchanged by Au and Pt substitutions, while the substitution of Hf for Ti causes a drop in transformation temperatures. The NiTiPd, NiTiPdAu and NiTiPdHf alloys exhibited transformation temperatures that were highest in the Ti-rich compositions, slightly lower at stoichiometry, and significantly reduced when the Ti equivalent composition was less than 50 at.%. For the NiTiPdPt alloy, transformation temperatures were highest for the Ti-rich compositions, lowest at stoichiometry, and slightly higher in the Ni-rich composition. When thermally cycled under constant stresses of up to 300 MPa, all of the alloys had transformation strains, and therefore work outputs, which increased with increasing stress. In each series of alloys, the transformation strain and thus work output was highest for stoichiometric or Ti-rich compositions while permanent strain associated with the constant-load thermal cycling was lowest for alloys with Ni-equivalent-rich compositions. Based on these results, basic rules for optimizing the composition of NiTiPd alloys for actuator performance will be discussed.

Bigelow, Glen S.↗
NASA NTRS2007

Radiation Test Challenges for Scaled Commerical Memories

As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.

LaBel, Kenneth A.↗
NASA NTRS1975

Performance of coded MFSK in a Rician fading channel

The performance of convolutional codes in conjunction with noncoherent multiple frequency shift-keyed (MFSK) modulation and Viterbi maximum likelihood decoding on a Rician fading channel is examined in detail. While the primary motivation underlying this work has been concerned with system performance on the planetary entry channel, it is expected that the results are of considerably wider interest. Particular attention is given to modeling the channel in terms of a few meaningful parameters which can be correlated closely with the results of theoretical propagation studies. Fairly general upper bounds on bit error probability performance in the presence of fading are derived and compared with simulation results using both unquantized and quantized receiver outputs. The effects of receiver quantization and channel memory are investigated and it is concluded that the coded noncoherent MFSK system offers an attractive alternative to coherent BPSK in providing reliable low data rate communications in fading channels typical of planetary entry missions.

Modestino, J. W.↗
NASA NTRS1987

Practical implementation of an accurate method for multilevel design sensitivity analysis

Solution techniques for handling large scale engineering optimization problems are reviewed. Potentials for practical applications as well as their limited capabilities are discussed. A new solution algorithm for design sensitivity is proposed. The algorithm is based upon the multilevel substructuring concept to be coupled with the adjoint method of sensitivity analysis. There are no approximations involved in the present algorithm except the usual approximations introduced due to the discretization of the finite element model. Results from the six- and thirty-bar planar truss problems show that the proposed multilevel scheme for sensitivity analysis is more effective (in terms of computer incore memory and the total CPU time) than a conventional (one level) scheme even on small problems. The new algorithm is expected to perform better for larger problems and its applications on the new generation of computer hardwares with 'parallel processing' capability is very promising.

Nguyen, Duc T.↗
NASA NTRS1990

Porous-Floating-Gate Field-Effect Transistor

Porous-floating-gate, "vertical" field-effect transistor proposed as programmable analog memory device especially suitable for use in electronic neural networks. Analog value of electrical conductance of device represents synaptic weight (strength of synaptic connection) repeatedly modified by application of suitable writing or erasing voltage. Suited for hardware implementations of massively parallel neural-network architectures for two important reasons: vertical transistor structure requires only two external electrodes, and use of tailored amorphous semiconductors provides choice of very wide range of low conductivity values, dictated by overall power dissipation requirements in massively parallel neural-network circuits.

Thakoor, Anilkumar P.↗
NASA NTRS1991

Multiple-Bit Errors Caused By Single Ions

Report describes experimental and computer-simulation study of multiple-bit errors caused by impingement of single energetic ions on 256-Kb dynamic random-access memory (DRAM) integrated circuit. Studies illustrate effects of different mechanisms for transport of charge from ion tracks to various elements of integrated circuits. Shows multiple-bit errors occur in two different types of clusters about ion tracks causing them.

Zoutendyk, John A.↗
NASA NTRS1992

Model-driven mapping onto distributed memory parallel computers

The author addresses the problem of exploiting the parallelism available in a program to efficiently employ the resources of the target machine in the context of building a mapping compiler for a distributed memory parallel machine. He demonstrates the effectiveness of using execution models to select the best mapping technique from among those available for a given program segment on a particular machine. Through analysis of the execution models for several mapping techniques for one class of programs on a linear processor array, it is shown that selecting the best technique for a particular program instance can make a significant difference in performance. On the other hand, the results of benchmarks from a mapping compiler for the Warp systolic array machine show that the execution models considered are accurate enough to select the best mapping technique for a given program.

Sussman, Alan↗
NASA NTRS1998

A Measurement and Simulation Based Methodology for Cache Performance Modeling and Tuning

We present a cache performance modeling methodology that facilitates the tuning of uniprocessor cache performance for applications executing on shared memory multiprocessors by accurately predicting the effects of source code level modifications. Measurements on a single processor are initially used for identifying parts of code where cache utilization improvements may significantly impact the overall performance. Cache simulation based on trace-driven techniques can be carried out without gathering detailed address traces. Minimal runtime information for modeling cache performance of a selected code block includes: base virtual addresses of arrays, virtual addresses of variables, and loop bounds for that code block. Rest of the information is obtained from the source code. We show that the cache performance predictions are as reliable as those obtained through trace-driven simulations. This technique is particularly helpful to the exploration of various "what-if' scenarios regarding the cache performance impact for alternative code structures. We explain and validate this methodology using a simple matrix-matrix multiplication program. We then apply this methodology to predict and tune the cache performance of two realistic scientific applications taken from the Computational Fluid Dynamics (CFD) domain.

Waheed, Abdul↗