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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Measurement accuracy of flow velocity via a digital-frequency-counter laser velocimeter processor

The laser velocimeter (LV) technique has so far been successfully applied to many flow situations to obtain mean velocity and turbulence level measurements. The paper deals with a unique LV system employing a digital frequency counter for measurements of turbulence spectra within the objectives of achieving higher accuracies and a wider range of velocities than were possible by previous analog systems. Systematic analysis of the effects of LV system errors in the accuracy of the turbulence power spectral measurements is performed and shown to agree reasonably with the experimental LV spectra results. Sufficient understanding of the accuracy and limitations of the digital frequency counter LV spectral measurement system is obtained. Among the major system errors encountered in a typical digital frequency counter LV processor, the truncation error is regarded as the most serious source of error. The quantizing step size defined as the ratio of Doppler frequency to processor clock frequency is an important parameter in determining the dynamic range of a turbulence power spectrum.

Wang, J. C. F.↗
NASA NTRS1977

Formulation of consumables management models: Mission planning processor payload interface definition

Consumables models required for the mission planning and scheduling function are formulated. The relation of the models to prelaunch, onboard, ground support, and postmission functions for the space transportation systems is established. Analytical models consisting of an orbiter planning processor with consumables data base is developed. A method of recognizing potential constraint violations in both the planning and flight operations functions, and a flight data file storage/retrieval of information over an extended period which interfaces with a flight operations processor for monitoring of the actual flights is presented.

Torian, J. G.↗
NASA NTRS1977

Formulation of consumables management models. Development approach for the mission planning processor working model

The mission planning processor is a user oriented tool for consumables management and is part of the total consumables subsystem management concept. The approach to be used in developing a working model of the mission planning processor is documented. The approach includes top-down design, structured programming techniques, and application of NASA approved software development standards. This development approach: (1) promotes cost effective software development, (2) enhances the quality and reliability of the working model, (3) encourages the sharing of the working model through a standard approach, and (4) promotes portability of the working model to other computer systems.

Connelly, L. C.↗
NASA NTRS1977

A microcomputer-based low-cost Omega sensor processor

The engineering approach used in the design of a low cost Omega sensor processor is discussed. The processor and its operations are described, as well as the system hardware and software. Circuit details of the hardware modules and program listings for the FORTRAN and microcomputer software are included.

Salter, R. J., Jr.↗
NASA NTRS1977

Conceptual design of an on-board optical processor with components

The specification of components for a spacecraft on-board optical processor was investigated. A space oriented application of optical data processing and the investigation of certain aspects of optical correlators were examined. The investigation confirmed that real-time optical processing has made significant advances over the past few years, but that there are still critical components which will require further development for use in an on-board optical processor. The devices evaluated were the coherent light valve, the readout optical modulator, the liquid crystal modulator, and the image forming light modulator.

Walsh, J. R.↗
NASA NTRS1977

Formulation of consumables management models: Test plan for the mission planning processor working model

The test plan and test procedures to be used in the verification and validation of the software being implemented in the mission planning processor working model program are documented. The mission planning processor is a user oriented tool for consumables management and is part of the total consumables subsystem management concept. An overview of the working model is presented. Execution of the test plan will comprehensively exercise the working model software. An overview of the test plan, including a testing schedule, is presented along with the test plan for the unit, module, and system levels. The criteria used to validate the working model results for each consumables subsystem is discussed.

Connelly, L. C.↗
NASA NTRS1977

The application of charge-coupled device processors in automatic-control systems

The application of charge-coupled device (CCD) processors to automatic-control systems is suggested. CCD processors are a new form of semiconductor component with the unique ability to process sampled signals on an analog basis. Specific implementations of controllers are suggested for linear time-invariant, time-varying, and nonlinear systems. Typical processing time should be only a few microseconds. This form of technology may become competitive with microprocessors and minicomputers in addition to supplementing them.

Mcvey, E. S.↗
NASA NTRS1976

Use of a multi-look unfocussed SAR processor on spacecraft

Two methods of processing signals from a multi-look unfocussed synthetic-aperture radar are considered. A saving in the processor complexity is achieved in comparison to a fully focussed SAR system at the expense of slightly greater clutter levels and poorer along-track resolution. In addition, lower power consumption enables the unfocussed processor to increase the number of looks to compensate in part for the reduced resolution.

Fong, R. K. T.↗
NASA NTRS1978

MBASIC batch processor architectural overview

The MBASIC (TM) batch processor, a language translator designed to operate in the MBASIC (TM) environment is described. Features include: (1) a CONVERT TO BATCH command, usable from the ready mode; and (2) translation of the users program in stages through several levels of intermediate language and optimization. The processor is to be designed and implemented in both machine-independent and machine-dependent sections. The architecture is planned so that optimization processes are transparent to the rest of the system and need not be included in the first design implementation cycle.

Reynolds, S. M.↗
NASA NTRS1979

Multibeam single frequency synthetic aperture radar processor for imaging separate range swaths

A method and apparatus are described for single frequency multibeam imaging of multiple strips of range swath at high range intervals for those applications where it is desirable to cover a range swath much greater than is possible for a given interpulse interval. Data from a single frequency synthetic aperture radar (in which beam parameters are adjusted so that the return from each successive swath is received during successive interpulse periods) are separated in Dopple frequency for the return from each beam at the frequency plane of the processor. Alternatively, the image formed by each beam may be spatially separated in the azimuth direction and successively selected by positioning an appropriate slit in the recording plane of the processor.

Jain, A.↗
NASA NTRS1979

OPS MCC level B/C formulation requirements: Area targets and space volumes processor

The level B/C mathematical specifications for the area targets and space volumes processor (ATSVP) are described. The processor is designed to compute the acquisition-of-signal (AOS) and loss-of-signal (LOS) times for area targets and space volumes. The characteristics of the area targets and space volumes are given. The mathematical equations necessary to determine whether the spacecraft lies within the area target or space volume are given. These equations provide a detailed model of the target geometry. A semianalytical technique for predicting the AOS and LOS time periods is disucssed. This technique was designed to bound the actual visibility period using a simplified target geometry model and unperturbed orbital motion. Functional overview of the ATSVP is presented and it's detailed logic flow is described.

Bishop, M. J., Jr.↗
NASA NTRS1979

Reduced power processor requirements for the 30-cm diameter Hg ion thruster

An evaluation of simplifications for the thruster power processor interface for a 30 cm Hg ion thruster is presented. Tests on the engine, thruster control, and the power supplies are performed. Reduced power processors requirements are defined and the impact on thruster design, performance, and lifetime are assessed.

Rawlin, V. K.↗
NASA NTRS1978

A programmable power processor for a 25 kW power module

The paper presents the concept and major design problems of a programmable power processor for the 25 kW electrical power system for the Shuttle Orbiter. The load will be handled by three parallel power stages operated in phase sequence with each power transistor having its own commutating diode and filter inductor. The power stages will be run at a fixed frequency of 10 kHz with the 'on'-time variable up to 100%. The input filter bank in the breadboard programmable power processor is planned to be a series-parallel combination of tantalum cased tantalum wet-slug capacitors.

Kapustka, R. E.↗
NASA NTRS1979

User's guide: SPAR processor MN analysis of inelastic three-dimensional solids, part 2

A user's guide to the processor MN is presented. The processor MN is used to analyze systems in which some or all of the three dimensional elements have nonlinear stress-strain relations. Representations of nonlinear material behavior implemented into the system are provided including Von Mises yield criterion, the Prandtl-Reuss flow rule, and the mechanical sublayer method. The primary data sets used to represent the state of the system are presented.

Whetstone, W. D.↗
NASA NTRS1979

Detailed description of the HP-9825A HFRMP trajectory processor (TRAJ)

The computer code for the trajectory processor of the HP-9825A High Fidelity Relative Motion Program is described in detail. The processor is a 12-degrees-of-freedom trajectory integrator which can be used to generate digital and graphical data describing the relative motion of the Space Shuttle Orbiter and a free-flying cylindrical payload. Coding standards and flow charts are given and the computational logic is discussed.

Kindall, S. M.↗
NASA NTRS1980

HP-9825A HFRMP trajectory processor (#TRAJ), detailed description

The computer code for the trajectory processor (#TRAJ) of the high fidelity relative motion program is described. The #TRAJ processor is a 12-degrees-of-freedom trajectory integrator (6 degrees of freedom for each of two vehicles) which can be used to generate digital and graphical data describing the relative motion of the Space Shuttle Orbiter and a free-flying cylindrical payload. A listing of the code, coding standards and conventions, detailed flow charts, and discussions of the computational logic are included.

Kindall, S. M.↗
NASA NTRS1980

Advanced development of a programmable power processor

The need for the development of a multipurpose flexible programmable power processor (PPP) has increased significantly in recent years to reduce ever rising development costs. One of the program requirements the PPP specification will cover is the 25 kW power module power conversion needs. The 25 kW power module could support the Space Shuttle program during the 1980s and 1990s and could be the stepping stone to future large space programs. Trades that led to selection of a microprocessor controlled power processor are briefly discussed. Emphasis is given to the power processing equipment that uses a microprocessor to provide versatility that allows multiple use and to provide for future growth by reprogramming output voltage to a higher level (to 120 V from 30 V). Component selection and design considerations are also discussed.

Lukens, F. E.↗