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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12

CCSDS File Delivery Protocol (CFDP): Why it's Useful and How it Works

Reliable delivery of data products is often required across space links. For example, a NASA mission will require reliable delivery of images produced by an on-board detector. Many missions have their own (unique) way of accomplishing this, requiring custom software. Many missions also require manual operations (e.g. the telemetry receiver software keeps track of what data is missing, and a person manually inputs the appropriate commands to request retransmissions). The Consultative Committee for Space Data Systems (CCSDS) developed the CCSDS File Delivery Protocol (CFDP) specifically for this situation. CFDP is an international standard communication protocol that provides reliable delivery of data products. It is designed for use across space links. It will work well if run over the widely used CCSDS Telemetry and Telecommand protocols. However, it can be run over any protocol, and will work well as long as the underlying protocol delivers a reasonable portion of the data. The CFDP receiver will autonomously determine what data is missing, and request retransmissions as needed. The CFDP sender will autonomously perform the requested transmissions. When the entire data product is delivered, the CFDP receiver will let the CFDP sender know that the transaction has completed successfully. The result is that custom software becomes standard, and manual operations become autonomous. This paper will consider various ways of achieving reliable file delivery, explain why CFDP is the optimal choice for use over space links, explain how the core protocol works, and give some guidance on how to best utilize CFDP within various mission scenarios. It will also touch on additional features of CFDP, as well as other uses for CFDP (e.g. the loading of on-board memory and tables).

Ray, Tim↗

Probabilistic resource allocation system with self-adaptive capability

A probabilistic resource allocation system is disclosed containing a low capacity computational module (Short Term Memory or STM) and a self-organizing associative network (Long Term Memory or LTM) where nodes represent elementary resources, terminal end nodes represent goals, and weighted links represent the order of resource association in different allocation episodes. Goals and their priorities are indicated by the user, and allocation decisions are made in the STM, while candidate associations of resources are supplied by the LTM based on the association strength (reliability). Weights are automatically assigned to the network links based on the frequency and relative success of exercising those links in the previous allocation decisions. Accumulation of allocation history in the form of an associative network in the LTM reduces computational demands on subsequent allocations. For this purpose, the network automatically partitions itself into strongly associated high reliability packets, allowing fast approximate computation and display of allocation solutions satisfying the overall reliability and other user-imposed constraints. System performance improves in time due to modification of network parameters and partitioning criteria based on the performance feedback.

Yufik, Yan M.↗

Probabilistic resource allocation system with self-adaptive capability

A probabilistic resource allocation system is disclosed containing a low capacity computational module (Short Term Memory or STM) and a self-organizing associative network (Long Term Memory or LTM) where nodes represent elementary resources, terminal end nodes represent goals, and directed links represent the order of resource association in different allocation episodes. Goals and their priorities are indicated by the user, and allocation decisions are made in the STM, while candidate associations of resources are supplied by the LTM based on the association strength (reliability). Reliability values are automatically assigned to the network links based on the frequency and relative success of exercising those links in the previous allocation decisions. Accumulation of allocation history in the form of an associative network in the LTM reduces computational demands on subsequent allocations. For this purpose, the network automatically partitions itself into strongly associated high reliability packets, allowing fast approximate computation and display of allocation solutions satisfying the overall reliability and other user-imposed constraints. System performance improves in time due to modification of network parameters and partitioning criteria based on the performance feedback.

Yufik, Yan M.↗

Development of Shape Memory Alloys- Challenges and Solutions

Shape memory alloys (SMAs) are a unique class of multifunctional materials that have the ability to recover large deformations or generate high stresses in response to thermal, mechanical andor electromagnetic stimuli. These abilities have made them a viable option for actuation systems in aerospace, medical, and automotive applications, amongst others. However, despite many advantages and the fact that SMA actuators have been developed and used for many years, so far they have only found service in a limited range of applications. In order to expand their applications, further developments are needed to increase their reliability and stability and to address processing, testing and qualification needed for large-scale commercial application of SMA actuators. In this seminar, historical inhibitors of SMA applications and current research efforts by NASA Glenn Research Center and collaborators will be discussed. Relationships between fundamental physicalscientific understanding, and the direct transition to engineering and design of mechanisms using these novel materials will be highlighted. Examples will be presented related to targeted alloy development, microstructural control, and bulk-scale testing as a function of stresses, temperatures and harsh environments. The seminar will conclude with a summary of SMA applications under development and current advances.

Shape Memory Alloy↗

Method and apparatus for I-V data acquisition from solar cells

A method and apparatus for logging current-voltage (I-V) characteristic d of a solar cell module (10) in two modes using a portable instrument. One mode controls the load current through a circuit (36) in 256 equal intervals while voltage is measured from open circuit to at least halfway into the knee of the curve and the other mode controls the load voltage through a circuit (34) in 256 equal intervals from the lowest voltage measurement possible (short circuit) to at least halfway into the knee of the curve, under control of a microcomputer (12). All measurements are packed by discarding each measurement that is within 0.5% of the value predicted from two previous measurements, except every ninth (9th) measurement which is retained. The remaining data is further packed into a memory block of a detachable storage medium (14) by recording the data points in sequence following a header containing data common to all points, with each point having the value of the controlled parameter recorded as the number of increments from the previous point recorded followed by the measured value. The detachable storage medium is preferably a solid state device for reliability, and is transferable to a playback terminal which unpacks the data for analysis and display.

Cole, Steven W.↗

C-MOS array design techniques: SUMC multiprocessor system study

The current capabilities of LSI techniques for speed and reliability, plus the possibilities of assembling large configurations of LSI logic and storage elements, have demanded the study of multiprocessors and multiprocessing techniques, problems, and potentialities. Evaluated are three previous systems studies for a space ultrareliable modular computer multiprocessing system, and a new multiprocessing system is proposed that is flexibly configured with up to four central processors, four 1/0 processors, and 16 main memory units, plus auxiliary memory and peripheral devices. This multiprocessor system features a multilevel interrupt, qualified S/360 compatibility for ground-based generation of programs, virtual memory management of a storage hierarchy through 1/0 processors, and multiport access to multiple and shared memory units.

Clapp, W. A.↗

Development of a fault-tolerant microprocessor based computer system for space flight

A methodology for the design of a tightly coupled, highly reliable microprocessor based computer system is described. The concept of triple modular redundancy with sparing is used. The notion of synchronizing by using a single crystal oscillator is examined. The use of decoders to replace voters is also used. The decoders not only isolate the failed module but also allow error identification to be accomplished. Each module is to have its own RAM memory. The necessary circuitry to select a correct memory and the corresponding DMA controller was designed.

Montgomery, V. T.↗

Evaluation of wet tantalum capacitors after exposure to extended periods of ripple current, volume 1

The application of tantalum capacitors in the Viking Lander includes both dc voltage and ripple current electrical stress, high temperature during nonoperating times (sterilization), and high vibration and shock loads. The capacitors must survive these severe environments without any degradation if reliable performance is to be achieved. A test program was established to evaluate both wet-slug tantalum and wet-foil capacitors under conditions accurately duplicating actual Viking applications. Test results of the electrical performance characteristics during extended periods of ripple current, the characteristics of the internal silver migration as a function for extended periods of ripple current, and the existence of any memory characteristics are presented.

Watson, G. W.↗

Evaluation of wet tantalum capacitors after exposure to extended periods of ripple current, volume 2

The application of tantalum capacitors in the Viking Lander includes dc voltage and ripple current electrical stress, high temperature during nonoperating times (sterilization), and high vibration and shock loads. The capacitors must survive these severe environments without any degradation if reliable performance is to be achieved. A test program was established to evaluate both wet-slug tantalum and wet-foil capacitors under conditions accurately duplicating actual Viking applications. Test results of the electrical performance characteristics during extended periods of ripple current, the characteristics of the internal silver migration as a function of extended periods of ripple current, and the existence of any memory characteristics are presented.

Ward, C. M.↗

Flight critical system design guidelines and validation methods

Efforts being expended at NASA-Langley to define a validation methodology, techniques for comparing advanced systems concepts, and design guidelines for characterizing fault tolerant digital avionics are described with an emphasis on the capabilities of AIRLAB, an environmentally controlled laboratory. AIRLAB has VAX 11/750 and 11/780 computers with an aggregate of 22 Mb memory and over 650 Mb storage, interconnected at 256 kbaud. An additional computer is programmed to emulate digital devices. Ongoing work is easily accessed at user stations by either chronological or key word indexing. The CARE III program aids in analyzing the capabilities of test systems to recover from faults. An additional code, the semi-Markov unreliability program (SURE) generates upper and lower reliability bounds. The AIRLAB facility is mainly dedicated to research on designs of digital flight-critical systems which must have acceptable reliability before incorporation into aircraft control systems. The digital systems would be too costly to submit to a full battery of flight tests and must be initially examined with the AIRLAB simulation capabilities.

Holt, H. M.↗

A case for Redundant Arrays of Inexpensive Disks (RAID)

Increasing performance of CPUs and memories will be squandered if not matched by a similar performance increase in I/O. While the capacity of Single Large Expensive Disks (SLED) has grown rapidly, the performance improvement of SLED has been modest. Redundant Arrays of Inexpensive Disks (RAID), based on the magnetic disk technology developed for personal computers, offers an attractive alternative to SLED, promising improvements of an order of magnitude in performance, reliability, power consumption, and scalability. This paper introduces five levels of RAIDs, giving their relative cost/performance, and compares RAID to an IBM 3380 and a Fujitsu Super Eagle.

Patterson, David A.↗

Board Level Proton Testing Book of Knowledge for NASA Electronic Parts and Packaging Program

This book of knowledge (BoK) provides a critical review of the benefits and difficulties associated with using proton irradiation as a means of exploring the radiation hardness of commercial-off-the-shelf (COTS) systems. This work was developed for the NASA Electronic Parts and Packaging (NEPP) Board Level Testing for the COTS task. The fundamental findings of this BoK are the following. The board-level test method can reduce the worst case estimate for a board's single-event effect (SEE) sensitivity compared to the case of no test data, but only by a factor of ten. The estimated worst case rate of failure for untested boards is about 0.1 SEE/board-day. By employing the use of protons with energies near or above 200 MeV, this rate can be safely reduced to 0.01 SEE/board-day, with only those SEEs with deep charge collection mechanisms rising this high. For general SEEs, such as static random-access memory (SRAM) upsets, single-event transients (SETs), single-event gate ruptures (SEGRs), and similar cases where the relevant charge collection depth is less than 10 μm, the worst case rate for SEE is below 0.001 SEE/board-day. Note that these bounds assume that no SEEs are observed during testing. When SEEs are observed during testing, the board-level test method can establish a reliable event rate in some orbits, though all established rates will be at or above 0.001 SEE/board-day. The board-level test approach we explore has picked up support as a radiation hardness assurance technique over the last twenty years. The approach originally was used to provide a very limited verification of the suitability of low cost assemblies to be used in the very benign environment of the International Space Station (ISS), in limited reliability applications. Recently the method has been gaining popularity as a way to establish a minimum level of SEE performance of systems that require somewhat higher reliability performance than previous applications. This sort of application of the method suggests a critical analysis of the method is in order. This is also of current consideration because the primary facility used for this type of work, the Indiana University Cyclotron Facility (IUCF) (also known as the Integrated Science and Technology (ISAT) hall), has closed permanently, and the future selection of alternate test facilities is critically important. This document reviews the main theoretical work on proton testing of assemblies over the last twenty years. It augments this with review of reported data generated from the method and other data that applies to the limitations of the proton board-level test approach. When protons are incident on a system for test they can produce spallation reactions. From these reactions, secondary particles with linear energy transfers (LETs) significantly higher than the incident protons can be produced. These secondary particles, together with the protons, can simulate a subset of the space environment for particles capable of inducing single event effects (SEEs). The proton board-level test approach has been used to bound SEE rates, establishing a maximum possible SEE rate that a test article may exhibit in space. This bound is not particularly useful in many cases because the bound is quite loose. We discuss the established limit that the proton board-level test approach leaves us with. The remaining possible SEE rates may be as high as one per ten years for most devices. The situation is actually more problematic for many SEE types with deep charge collection. In cases with these SEEs, the limits set by the proton board-level test can be on the order of one per 100 days. Because of the limited nature of the bounds established by proton testing alone, it is possible that tested devices will have actual SEE sensitivity that is very low (e.g., fewer than one event in 1 × 10(exp 4) years), but the test method will only be able to establish the limits indicated above. This BoK further examines other benefits of proton board-level testing besides hardness assurance. The primary alternate use is the injection of errors. Error injection, or fault injection, is something that is often done in a simulation environment. But the proton beam has the benefit of injecting the majority of actual SEEs without risk of something being missed, and without the risk of simulation artifacts misleading the SEE investigation.

Guertin, Steven M.↗

Using parallel banded linear system solvers in generalized eigenvalue problems

Subspace iteration is a reliable and cost effective method for solving positive definite banded symmetric generalized eigenproblems, especially in the case of large scale problems. This paper discusses an algorithm that makes use of two parallel banded solvers in subspace iteration. A shift is introduced to decompose the banded linear systems into relatively independent subsystems and to accelerate the iterations. With this shift, an eigenproblem is mapped efficiently into the memories of a multiprocessor and a high speed-up is obtained for parallel implementations. An optimal shift is a shift that balances total computation and communication costs. Under certain conditions, we show how to estimate an optimal shift analytically using the decay rate for the inverse of a banded matrix, and how to improve this estimate. Computational results on iPSC/2 and iPSC/860 multiprocessors are presented.

Zhang, Hong↗

Using parallel banded linear system solvers in generalized eigenvalue problems

Subspace iteration is a reliable and cost effective method for solving positive definite banded symmetric generalized eigenproblems, especially in the case of large scale problems. This paper discusses an algorithm that makes use of two parallel banded solvers in subspace iteration. A shift is introduced to decompose the banded linear systems into relatively independent subsystems and to accelerate the iterations. With this shift, an eigenproblem is mapped efficiently into the memories of a multiprocessor and a high speedup is obtained for parallel implementations. An optimal shift is a shift that balances total computation and communication costs. Under certain conditions, we show how to estimate an optimal shift analytically using the decay rate for the inverse of a banded matrix, and how to improve this estimate. Computational results on iPSC/2 and iPSC/860 multiprocessors are presented.

DISTRIBUTED MEMORY MULTIPROCES↗

Electronics Shielding and Reliability Design Tools

It is well known that electronics placement in large-scale human-rated systems provides opportunity to optimize electronics shielding through materials choice and geometric arrangement. For example, several hundred single event upsets (SEUs) occur within the Shuttle avionic computers during a typical mission. An order of magnitude larger SEU rate would occur without careful placement in the Shuttle design. These results used basic physics models (linear energy transfer (LET), track structure, Auger recombination) combined with limited SEU cross section measurements allowing accurate evaluation of target fragment contributions to Shuttle avionics memory upsets. Electronics shielding design on human-rated systems provides opportunity to minimize radiation impact on critical and non-critical electronic systems. Implementation of shielding design tools requires adequate methods for evaluation of design layouts, guiding qualification testing, and an adequate follow-up on final design evaluation including results from a systems/device testing program tailored to meet design requirements.

Wilson, John W.↗

LSI computer for 1980's space mission

The low power, high reliability, SUMC-III-C computer is one member of the Space Ultrareliable Modular Computer (SUMC) family designed by NASA/MSFC to meet a wide range of missions through modularity in word size, throughput, and reliability. The SUMC-III-C, directed at such missions as the Large Space Telescope and Space Tug, uses custom designed CMOS/SOS LSI arrays with critical computer paths packaged on thick-film hybrids. This technology provides 300 to 600 logic gates per array with a typical stage delay of 3 to 5 nsec. SUMC-III-C is fully S/360 compatible at the user level, and includes virtual memory for the first time in an aerospace computer.

Clapp, W. A.↗

Video-task assessment of learning and memory in Macaques (Macaca mulatta) - Effects of stimulus movement on performance

Effects of stimulus movement on learning, transfer, matching, and short-term memory performance were assessed with 2 monkeys using a video-task paradigm in which the animals responded to computer-generated images by manipulating a joystick. Performance on tests of learning set, transfer index, matching to sample, and delayed matching to sample in the video-task paradigm was comparable to that obtained in previous investigations using the Wisconsin General Testing Apparatus. Additionally, learning, transfer, and matching were reliably and significantly better when the stimuli or discriminanda moved than when the stimuli were stationary. External manipulations such as stimulus movement may increase attention to the demands of a task, which in turn should increase the efficiency of learning. These findings have implications for the investigation of learning in other populations, as well as for the application of the video-task paradigm to comparative study.

Washburn, David A.↗

Search for optimal distance spectrum convolutional codes

In order to communicate reliably and to reduce the required transmitter power, NASA uses coded communication systems on most of their deep space satellites and probes (e.g. Pioneer, Voyager, Galileo, and the TDRSS network). These communication systems use binary convolutional codes. Better codes make the system more reliable and require less transmitter power. However, there are no good construction techniques for convolutional codes. Thus, to find good convolutional codes requires an exhaustive search over the ensemble of all possible codes. In this paper, an efficient convolutional code search algorithm was implemented on an IBM RS6000 Model 580. The combination of algorithm efficiency and computational power enabled us to find, for the first time, the optimal rate 1/2, memory 14, convolutional code.

Connor, Matthew C.↗