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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Electron cyclotron emission detection of neoclassical tearing modes for control for ITER

Successful operation of ITER requires control of magnetic instabilities including neoclassical tearing modes (NTMs) that can degrade confinement and lead to disruption. Low latency detection by electron cyclotron emission (ECE) diagnostics has been demonstrated in a few current experiments. Using a synthetic diagnostic, we demonstrate low latency NTM detection for ITER with plasmas described by ITER IMAS database scenarios and with realistic limitations imposed on the instrumentation by these high temperature scenarios. 2/1 NTMs are detected 430 ms after magnetic island seeding and before island locking. The radiometer configuration was optimized using simulation, and the smallest detectable island size was explored. Island sizes of ∼3 cm are detectable at the 2/1 surface. The simulated signals incorporate recent physics models for island growth and rotation, which show early locking and continued island growth after locking and before disruption. This work determines limits for ITER ECE spatial resolution imposed by relativistic broadening of channels, which informs hardware design. Real-time detection is demonstrated in hardware that is required by ITER, including on an NI PXI-7853R FPGA system. Development of a synthetic diagnostic and details of the hardware will be discussed.

Cyclotron radiation↗
DOE OSTI2020

Preliminary design overview and performance assessment of the ITER low-field side reflectometer

The design of the ITER low-field side reflectometer (LFSR) has matured to a complete end-to-end preliminary design. LFSR will supply three key plasma measurements: (1) electron density profile, (2) electron density fluctuations, and (3) poloidal rotation. Simultaneous measurements of the three quantities are enabled by an array of six monostatic antennas which inject from an equatorial port on the outboard side of the ITER vessel. Low-loss transmission lines, consisting of corrugated, overmoded waveguide and miter bends, transmit the 30–165 GHz, O- and X-mode signals to and from the ITER plasma. Integrated transmission-line components serve a range of purposes, such as protection from high-power stray radiofrequency radiation, accommodation of transmission-line displacement, and simultaneous measurement of reference and plasma phases during the discharge. Broadband transmission signals are realized by full-band microwave transceivers combined with quasi-optical multiplexing. A field-programmable gate array (FPGA) processor demodulates the profile reflectometer signals, enabling real-time density profile measurements for plasma control system feedback. A full-scale transmission line test facility provides an integrated environment to assess the performance of critical LFSR components. Theoretical modeling together with insertion loss measurements provide the basis for a comprehensive power budget, which accounts for transmitted output power, transmission-line losses, antenna coupling, and plasma effects. Results indicate that high signal-to-noise ratios are achievable with the current design. A synthetic reflectometer model, using real design parameters and baseline ITER profiles, has been developed to estimate the return signal. With evolving microwave and data acquisition technologies, full-band, ultrafast sweeps (<1 μs) will be realizable for ITER.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2020

Performance of the upgraded PreProcessor of the ATLAS Level-1 Calorimeter Trigger

The PreProcessor of the ATLAS Level-1 Calorimeter Trigger prepares the analogue trigger signals sent from the ATLAS calorimeters by digitising, synchronising, and calibrating them to reconstruct transverse energy deposits, which are then used in further processing to identify event features. During the first long shutdown of the LHC from 2013 to 2014, the central components of the PreProcessor, the Multichip Modules, were replaced by upgraded versions that feature modern ADC and FPGA technology to ensure optimal performance in the high pile-up environment of LHC Run 2. This paper describes the features of the new Multichip Modules along with the improvements to the signal processing achieved.

47 OTHER INSTRUMENTATION↗
DOE OSTI2021

The continuous readout stream of the MicroBooNE liquid argon time projection chamber for detection of supernova burst neutrinos

The MicroBooNE continuous readout stream is a parallel readout of the MicroBooNE liquid argon time projection chamber (LArTPC) which enables detection of non-beam events such as those from a supernova neutrino burst. The low energies of the supernova neutrinos and the intense cosmic-ray background flux due to the near-surface detector location makes triggering on these events very challenging. Instead, MicroBooNE relies on a delayed trigger generated by SNEWS (the Supernova Early Warning System) for detecting supernova neutrinos. The continuous readout of the LArTPC generates large data volumes, and requires the use of real-time compression algorithms (zero suppression and Huffman compression) implemented in an FPGA (field-programmable gate array) in the readout electronics. In this paper we present the results of the optimization of the data reduction algorithms, and their operational performance. To demonstrate the capability of the continuous stream to detect low-energy electrons, a sample of Michel electrons from stopping cosmic-ray muons is reconstructed and compared to a similar sample from the lossless triggered readout stream.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2021

The DAQ system of the 12,000 channel CMS high granularity calorimeter prototype

The CMS experiment at the CERN LHC will be upgraded to accommodate the 5-fold increase in the instantaneous luminosity expected at the High-Luminosity LHC (HL-LHC). Concomitant with this increase will be an increase in the number of interactions in each bunch crossing and a significant increase in the total ionising dose and fluence. One part of this upgrade is the replacement of the current endcap calorimeters with a high granularity sampling calorimeter equipped with silicon sensors, designed to manage the high collision rates. As part of the development of this calorimeter, a series of beam tests have been conducted with different sampling configurations using prototype segmented silicon detectors. In the most recent of these tests, conducted in late 2018 at the CERN SPS, the performance of a prototype calorimeter equipped with ≈12,000 channels of silicon sensors was studied with beams of high-energy electrons, pions and muons. This paper describes the custom-built scalable data acquisition system that was built with readily available FPGA mezzanines and low-cost Raspberry Pi computers.

47 OTHER INSTRUMENTATION↗
DOE OSTI2021

In-pixel automatic threshold calibration for the CMS Endcap Timing Layer readout chip

We present the implementation and verification of an in-pixel automatic threshold calibration circuit for the CMS Endcap Timing Layer (ETL) in the High-Luminosity LHC upgrade. The discriminator threshold of the ETL readout chip (ETROC) needs to be calibrated regularly to mitigate the circuit baseline change. Traditional methods need a lot of communication through a slow control system hence are time-consuming. This paper describes an in-pixel automatic scheme with improvements in operating time and usability. In this scheme, a sample-accumulation circuit is used to measure the average discriminator output. A binary successive approximation and linear combination scan are applied to find the equivalent baseline. The actual calibration procedure has been first implemented in FPGA firmware and tested with the ETROC front-end prototype chip (ETROC0). The calibration circuit has been implemented with Triple Modular Redundancy (TMR) and verified with Single Event Effects (SEEs) simulation. A complete calibration process lasts 35 ms with a 40 MHz clock. In the worst case, the dynamic and static power consumption are estimated to be 300 uW and 10.4 uW, respectively. The circuit design, implemented in a 65 CMOS technology, will be integrated into ETROC2, the next iteration of the ETROC with a 16 x16 pixel matrix.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

The Octopus processor for the CMS L1 muon trigger for High Luminosity LHC

The upgraded L1 muon trigger system of the CMS experiment in the High Luminosity Large Hadron Collider is based on custom processors featuring large Field Programmable Gate Arrays (FPGAs) connected by large numbers of optical links. These provide the I/O bandwidth and power necessary to process the complex algorithms used during the collection of physics data. The design and performance requirements of these processors creates significant challenges in signal integrity, power delivery, and thermal management. In this paper we describe the Octopus processor, featuring a large Xilinx Virtex Ultrascale+ FPGA and up to 128 links interfaced to optics through high quality twin-ax copper cables. Results on signal integrity at 25 Gb/s and the first demonstration of 50+ Gb/s links with pluggable optics in CMS are also shown, demonstrating bit error rates below 10 –15 at a 95% confidence level. The thermal performance is measured inside an Advanced-TCA crate with acceptable thermal margins up to 200 W of chip power. Future improvements are mentioned, potentially allowing operation at up to 300 W.

Instruments & Instrumentation↗
DOE OSTI2022

CMS phase-2 DAQ and timing hub prototyping results and perspectives

This paper describes recent progress on the design of the DAQ and Timing Hub, or DTH, an ATCA (Advanced Telecommunications Computing Architecture) hub board intended for the phase-2 upgrade of the CMS experiment. Prototyping was originally divided into multiple feature lines, spanning all different aspects of the DTH functionality. The second DTH prototype merges all R&D and prototyping lines into a single board, which is intended to be the production candidate. Emphasis is on the process and experience in going from the first to the second DTH prototype, which included a change of the chosen FPGA as well as the integration of a commercial networking solution.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

The level-1 trigger for the SuperCDMS experiment at SNOLAB

The SuperCDMS SNOLAB dark matter search experiment aims to be sensitive to energy depositions down to Script O(1 eV). This imposes requirements on the resolution, signal efficiency, and noise rejection of the trigger system. To accomplish this, the SuperCDMS level-1 trigger system is implemented in an FPGA on a custom PCB. A time-domain optimal filter algorithm realized as a finite impulse response filter provides a baseline resolution of 0.38 times the standard deviation of the noise, σn, and a 99.9% trigger efficiency for signal amplitudes of 1.1 σ n in typical noise conditions. Embedded in a modular architecture, flexible trigger logic enables reliable triggering and vetoing in a dead-time-free manner for a variety of purposes and run conditions. The trigger architecture and performance are detailed in this article.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

Charged particle tracking in real-time using a full-mesh data delivery architecture and associative memory techniques

We present a flexible and scalable approach to address the challenges of charged particle track reconstruction in real-time event filters (Level-1 triggers) in collider physics experiments. The method described here is based on a full-mesh architecture for data distribution and relies on the Associative Memory approach to implement a pattern recognition algorithm that quickly identifies and organizes hits associated to trajectories of particles originating from particle collisions. We describe a successful implementation of a demonstration system composed of several innovative hardware and algorithmic elements. The implementation of a full-size system relies on the assumption that an Associative Memory device with the sufficient pattern density becomes available in the future, either through a dedicated ASIC or a modern FPGA. We demonstrate excellent performance in terms of track reconstruction efficiency, purity, momentum resolution, and processing time measured with data from a simulated LHC-like tracking detector.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

A high-resolution clock phase shifter circuitry for ALTIROC

Abstract A high-resolution clock phase shifter is implemented to adjust the phase of multiple clocks at 40 MHz, 80 MHz, or 640 MHz in the ALTIROC chip. The phase shifter has a coarse-phase shifter and a fine-phase shifter to achieve a step size of 97.7 ps and an adjustable range of 25 ns. The fine delay unit is based on a Delay Locked Loop (DLL) operating at 640 MHz. The phase shifter is fabricated in a 130 nm CMOS process. The area of the phase shifter is 725 µm × 248 µm. The Differential Non-Linearity (DNL) and the Integral Non-Linearity (INL) are ±0.6 LSB and ±0.75 LSB, respectively. The jitter from −25 °C to 20 °C is less than 15.5 ps (RMS), including the contributions from the FPGA clock source and the PLL. The power consumption is 11.2 mW.

Instruments & Instrumentation↗
DOE OSTI2023

Electronics for the far-forward CMS muon detector upgrade, ME0

Abstract With the High Luminosity upgrade of the Large Hadron Collider (LHC) we expect increased instantaneous luminosities up to 7.5 × 10 34 cm −2 s −1 , or five times more than the original values. In order to maintain performance of the Compact Muon Solenoid (CMS) experiment under these conditions, ME0 is one of three new muon sub-detectors being added, along with GE1/1 and GE2/1, which use the triple Gas Electron Multiplier (GEM) technology. ME0 is designed to cover the forward region of 2.0 < | η | < 2.8, thus improving muon reconstruction at high background rates by supplementing other overlapping muon subsystems up to | η | = 2.4, while also extending the acceptance for the first time to | η | = 2.8. The readout electronics for ME0 must be designed to accommodate high data rates and be sufficiently radiation hard to operate close to the beamline. The Optohybrid (OH) board for ME0, which reads out data from the front-end VFAT3b ASICs, has therefore been designed to operate without an FPGA (unlike GE1/1 and GE2/1) to ensure radiation hardness. The ME0 OH uses the radiation-hard CERN-designed lpGBT ASIC and VTRx+ optical transceiver module for high bandwidth optical links up to 10.24 Gb/s. The backend system is based on the ATCA standard. The design and development status of the readout electronics for ME0 is presented, along with recent results from integration tests performed using the first prototypes.

Instruments & Instrumentation↗
DOE OSTI2023

The New Small Wheel electronics

The increase in luminosity, and consequent higher backgrounds, of the LHC upgrades require improved rejection of fake tracks in the forward region of the ATLAS Muon Spectrometer. The New Small Wheel upgrade of the Muon Spectrometer aims to reduce the large background of fake triggers from track segments that don't originate from the interaction point. The New Small Wheel employs two detector technologies, the resistive strip Micromegas detectors and the “small” Thin Gap Chambers, with a total of 2.45 million electrodes to be sensed. The two technologies require the design of a complex electronics system given that it consists of two different detector technologies and is required to provide both precision readout and a fast trigger. It will operate in a high background radiation region up to about 20 kHz/cm 2 at the expected HL-LHC luminosity of $\mathcal{L}$= 7.5 × 10 34 cm -2 s -1 . The architecture of the system is strongly defined by the GBTx data aggregation ASIC, the newly-introduced FELIX data router and the software based data handler of the ATLAS detector. The electronics complex of this new detector was designed and developed in the last ten years and consists of multiple radiation tolerant Application Specific Integrated Circuits, multiple front-end boards, dense boards with FPGA's and purpose-built Trigger Processor boards within the ATCA standard. The New Small Wheel has been installed in 2021 and is undergoing integration within ATLAS for LHC Run 3. It should operate through the end of Run 4 (December 2032). In this manuscript, the overall design of the New Small Wheel electronics is presented.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

Correction of the baseline fluctuations in the GEM-based ALICE TPC

To operate the ALICE Time Projection Chamber in continuous mode during the Run 3 and Run 4 data-taking periods of the Large Hadron Collider, the multi-wire proportional chamber-based readout was replaced with gas-electron multipliers. As expected, the detector performance is affected by the so-called common-mode effect, which leads to significant baseline fluctuations. A detailed study of the pulse shape with the new readout has revealed that it is also affected by ion tails. Since reconstruction and data compression are performed fully online, these effects must be corrected at the hardware level in the FPGA-based common readout units. The characteristics of the common-mode effect and of the ion tail, as well as the algorithms developed for their online correction, are described in this paper. The common-mode dependencies are studied using machine-learning techniques. Toy Monte Carlo simulations are performed to illustrate the importance of online corrections and to investigate the performance of the developed algorithms.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

Development of a test system for data links of the ATLAS Inner Tracker (ITk) upgrade silicon pixel detector

This contribution introduces a novel test system developed to evaluate the signal transmission quality in high-speed data links for the 2026 Inner Tracker (ITk) upgrade of the ATLAS experiment. Using an FPGA-based data acquisition (DAQ) framework, the setup can run simultaneous Bit Error Rate (BER) tests for up to 64 channels and generate virtual eye diagrams, for qualifying the ∼26k electrical links at the ATLAS ITk data rate of 1.28 Gb/s. The paper includes results from system calibration, yielding its contribution to the measured losses, and preliminary results from tests of prototype and pre-production assemblies of on-detector links of the three ATLAS ITk Pixel subsystems.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

Readout electronics for low occupancy High-Pressure Gas TPCs

High-Pressure Gas Time Projection Chambers (HPgTPCs) have benefits such as low energy thresholds, magnetisability, and 4π acceptance, making them ideal for neutrino experiments such as DUNE. We present the design of an FPGA-based solution optimised for Gaseous Argon Near Detector (ND-GAr), which is part of the Phase-II more capable near detector for DUNE. These electronics reduce the cost significantly compared to using collider readout electronics, which are typically designed for much higher occupancy and therefore, for example, need much larger numbers of FPGAs and power per channel. We demonstrate the performance of our electronics with the Teststand for an Overpressurised Argon Detector (TOAD) at Fermilab in the US at a range of pressures and gas mixtures up to 4.5 barA, reading out ∼10 000 channels from a Multi-Wire Proportional Chamber (MWPC). The operation took place between April and July of 2024. We measure the noise characteristics of the system to be sufficiently low, and we identify sources of noise that can be further mitigated in the next iteration. We also note that the cooling scheme used in the test requires improvement before full-scale deployment. Despite these necessary improvements, we show that the system can fulfil the needs of a HPgTPC for a fraction of the price of collider readout electronics.

Data acquisition concepts↗
DOE OSTI2026

Flashlamp drive system for a high-energy 10–100 kHz pulse-burst Nd:YAG laser

We present the design of the flashlamp drive system for the NG100 laser, a 1 J/pulse, 10–100 kHz, pulse-burst Nd:YAG laser system being developed for application in a Thomson scattering plasma diagnostic. This flashlamp drive system is under active development, with a prototype now being constructed. The flashlamp drive system is modular, with each module capable of driving a series pair of linear flashlamps. Each drive module contains and is controlled by a dedicated Analog Regulator Controller. Thus each module is independently operable and controllable. This modular approach imposes no intrinsic limit to the number of modules that may be applied to drive the flashlamp pairs in a laser system. Each flashlamp drive module has a switch-regulated topology. An 1800 V main capacitor bank provides 25 kJ of energy storage, while a lower voltage output capacitor bank provides filtering and the initial energy delivered to the flashlamps at the start of the drive pulse. The main bank is recharged after each flashlamp drive pulse. As energy is drawn from the output bank by the flashlamps, an IGBT switching regulator feeds current from the main bank through an inductor to replenish the output capacitor bank. The rate of replenishment is feedback-controlled to maintain a regulated supply of power to the flashlamp load, with a setpoint range of 0.07 to 1.65 MW. An Analog Regulator Controller produces two-state variable pulse width feedback switching of the regulator IGBT. The switching frequency is ≤ 20 kHz, dynamically adjusted to limit ripple of the flashlamp power to ±3% statistical standard deviation of mean. For development or troubleshooting, each module is operable independent of the laser digital control system (microcontroller and FPGA).

Plasma diagnostics - interferometry↗
DOE OSTI2026

High-bandwidth frequency domain multiplexed readout of transition-edge sensors for neutrinoless double beta decay searches

The next-generation of cryogenic neutrinoless double-beta decay experiments require increasingly fast readout in order to improve background discrimination. These experiments, operated as cryogenic calorimeters at ∼ 10 mK, are usually read out by high-impedance neutron transmutation doped (NTD) thermistors, which provide good energy resolution, but are limited by ∼ 1 ms response times. Superconducting detectors, such as transition-edge sensors (TESs) with a time resolution of ∼ 100 μs, offer superior timing performance over NTD semiconductor bolometers. To make this technology viable for an application to a thousand or more channels, multiplexed readout is necessary in order to minimize the thermal load and radioactive contamination induced by the readout. Frequency-domain multiplexing readout (fMUX) for TESs, previously developed at Berkeley Lab and McGill University, is currently in use for mm-wave telescopes with detector sampling rates in the order of 100 Hz. We demonstrate a new readout system, based on the McGill/Berkeley digital fMux readout, to satisfy the higher bandwidth and noise requirements of the next generation of TES-instrumented cryogenic calorimeters. Each multiplexing readout module comprises 10 superconducting resonators in the 1–5 MHz range and a DC superconducting quantum interference device (DC-SQUID), interfaced to high-speed field programmable gate array (FPGA)-based electronics for digital signal processing and low-latency SQUID feedback. The new readout samples detectors at 156 kHz, three orders of magnitude faster than its cosmology-oriented predecessor, and demonstrates a stable feedback bandwidth of 3 kHz in a real TES-based system.

47 OTHER INSTRUMENTATION↗