Independent Electron and Ion Energy Distribution Control for Semiconductor Processing Phase I Final Technical Report
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Optoelectronic devices, such as photovoltaic devices, comprising a low band gap, solution processable diketopyrrolopyrrole or dithioketopyrrolopyrrole chromophore core or cores are disclosed. Also disclosed are methods of fabricating such optoelectronic devices.
Vapor phase transport systems and methods of depositing perovskite films are described. In an embodiment, a deposition method includes feeding a perovskite solution or constituent powder to a vaporizer, followed by vaporization and depositing the constituent vapor as a perovskite film. In an embodiment, a deposition system and method includes vaporizing different perovskite precursors in different vaporization zones at different temperatures, followed by mixing the vaporized precursors to form a constituent vapor, and depositing the constituent vapor as a perovskite film.
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The National Renewable Energy Laboratory (NREL) and John Deere Electronic Solutions (JDES) collaborated to develop and evaluate computer models and simulations related to the thermal performance of semiconductor device packaging for an inverter of an off-road vehicle ("Semiconductor Packaging"). The objective of the research was for NREL and JDES to develop a two or three-dimensional computer-aided design model of the Semiconductor Packaging ("Computer Model") for thermal performance evaluation in a simulation. The project developed computer models of a Semiconductor Package of silicon-carbide semiconductor devices with appropriate thermal dissipation via one or more of the following thermal features: a double-sided planar cooling configuration, an air-cooled configuration, a liquid-cooled configuration for off-road inverter applications in a relevant simulated operating environment. It is noted that surface area and prototype product embodiment consisting of air-cooled and liquid-cooled configurations may and may not be in direct contact with power semiconductor chips. The idea was to explore and develop packaging and thermal management technology for power semiconductors that was most effective in the performance yet had least burden in overall product cost for a given application.
The U.S. Department of Energy’s Advanced Manufacturing Office (predecessor to AMMTO) established PowerAmerica in December 2014 to develop and accelerate the adoption of wide bandgap (WBG) semiconductor chips and power electronics in manufacturing. The objective was to spark early commercialization of energy efficient products; educate and train the workforce; create high-tech jobs; and nurture the growth of the U.S. WBG semiconductor manufacturing industry. PowerAmerica isled by North Carolina State University by way of a five-year, $140M cooperative agreement with DoE. This private-public partnership with DoE includes member companies ranging from startups and small-medium enterprises to large system integrators, world-class universities, and national labs. The WBG power electronic ecosystem formed by our diverse membership is focused on using advanced manufacturing to 1) lower the cost of silicon carbide and gallium nitride semiconductor devices to be comparable to silicon devices; 2) demonstrate the system benefits and energy efficiency advantages of WBG semiconductor power electronics through system demonstrations that validate their effectiveness; and 3) build an education pipeline for a skilled workforce to meet the future demand for emerging WBG semiconductor markets — and enhance U.S. economic competitiveness globally. PowerAmerica was initially funded in six budget periods, each lasting 12 to 18 months. By the end of Budget Period 6 (August 2023), PowerAmerica had achieved its major objectives in technology development, semiconductor device cost reduction, ecosystem growth and engagement, and education and workforce development. Through strategic foundry investments, we helped to establish the first U.S. SiC foundry (X-FAB) and supported a lab (Microchip) to start SiC volume production. We’ve helped bring together companies from different parts of the supply chain, resulting in several successful new partnerships and business relationships. Through projects with some of the largest manufacturers of energy-intensive equipment in the U.S. — John Deere, GE, United Technologies, Raytheon, Carrier, Toshiba, and others — we have successfully demonstrated the energy and system benefits of WBG technology. We have also harnessed the unique capabilities and facilities of national labs — the Naval Research Laboratory, National Renewable Energy Laboratory, and Argonne National Laboratory — to help solve challenging technical problems for industry. Thanks to our many webinars, tutorials, annual events, and presence at major energy and electronics conferences around the world, the PowerAmerica name has become synonymous with WBG technology advancement. The commercial interest in WBG technology is higher than ever; companies and governments around the world have announced hundreds of millions of dollarsin future investment to build capacity — and compete with silicon in many markets and applications. We have trained hundreds of engineering students, from universities across the U.S., through hands-on projects and WBG coursework. Working professionals have also benefited through the years from our many targeted short courses, tutorials, and technical webinars. In short, PowerAmerica has made great strides in each of our key objectives, and the organization has been operating without government or NC State
Control of electrical doping is indispensable in any semiconductor device, and both efficient hole and electron doping are required for many devices. In organic semiconductors, however, electron doping has been essentially more problematic compared to hole doping because in general organic semiconductors have low electron affinities and require dopants with low ionization potentials that are often air-sensitive. Here, we adapt an efficient molecular doping method, so-called ion-exchange doping, to dope electrons in a polymeric semiconductor. We initially reduce the polymeric semiconductor using one electron transfer from molecular dopants, and then the ionized dopants in the resulting air-unstable films are replaced with secondary ions via cation exchange. Improved ambient stability and crystallinity of the doped polymeric semiconductors are achieved when a specific bulky molecular cation was chosen as the secondary ion, compared to conventional methods. The presented strategy can overcome the trade-off relationship between reducing capability and ambient stability in molecular dopants, and a wider selection of dopant ions will help to realize ambient-stable electron conductors.
Photoelectrochemical cells (PECs) can utilize solar energy for water splitting to produce H 2 as a clean fuel. The most critical components of a water-splitting PEC are semiconductor electrodes (photoelectrodes) that absorb solar energy to generate photoexcited charge carriers and transport them to the electrode/electrolyte interface for water reduction and oxidation reactions. While efficient PEC hydrogen production has been successfully demonstrated on the laboratory scale, the commercial viability of PECs depends critically on the cost of H 2 produced by the PECs, which is affected by the cost of PEC construction. Therefore, identifying promising inexpensive semiconductor electrodes is important. The goal of this project was to bring an advancement in the synthesis and understanding of inexpensive polycrystalline photoelectrodes based on oxides. Oxide-based semiconductors are inexpensive, easy to fabricate, and relatively more stable in aqueous media compared to other types of semiconductors. This project developed new electrodeposition methods to produce a variety of oxide-based semiconductor electrodes with precisely controlled compositions and morphologies to enhance photon absorption, electron-hole separation, and the use of electrons and holes for desired chemical reactions. The resulting high-quality photoelectrodes were investigated to establish the structure-composition-morphology-photoelectrochemical property relationships to identify the advantages and limitations of each oxide semiconductor system.
Semiconductor photoelectrochemistry is a dynamic and interdisciplinary field at the forefront of research in solar fuels, energy conversion, and catalysis. Here, this Perspective captures the collective insights from the second Gerischer Electrochemistry Today Symposium, held at Colorado State University in Fort Collins, CO, in August 2024, which convened leading researchers, early-career scientists, and industry partners to define the critical next steps for the field. Through interactive sessions, technical talks, panel discussions, and training initiatives─including a Semiconductor Electrochemistry Bootcamp─the symposium emphasized three pillars of advancement: (i) facilitating the exchange of new ideas in semiconductor electrochemistry and charge separation; (ii) fostering the development of future researchers, research topics, and participation in the semiconductor workforce; and (iii) building community. This Energy Focus distills key themes from the meeting and identifies major knowledge gaps in the following areas: mechanisms of charge separation and recombination, role of defects and disorder, dynamic and operando characterization methods, interfacial chemistry and surface passivation, theoretical and modeling limitations, and standardization and benchmarking. The inclusive and collaborative structure of the symposium enabled the generation of this comprehensive report that will serve as a roadmap for fundamental and applied research in the rapidly evolving field of semiconductor electrochemistry over the next decade.
Spin accumulation in semiconductor structures at room temperature and without magnetic fields is key to enable a broader range of optoelectronic functionality. Current efforts are limited owing to inherent inefficiencies associated with spin injection across semiconductor interfaces. Here we demonstrate spin injection across chiral halide perovskite/III-V interfaces achieving spin accumulation in a standard semiconductor III-V (Al x Ga 1-x ) 0.5 In 0.5 P multiple quantum well light-emitting diode. The spin accumulation in the multiple quantum well is detected through emission of circularly polarized light with a degree of polarization of up to 15 ± 4%. The chiral perovskite/III-V interface was characterized with X-ray photoelectron spectroscopy, cross-sectional scanning Kelvin probe force microscopy and cross-sectional transmission electron microscopy imaging, showing a clean semiconductor/semiconductor interface at which the Fermi level can equilibrate. Finally, these findings demonstrate that chiral perovskite semiconductors can transform well-developed semiconductor platforms into ones that can also control spin.
This Phase 1 effort has focused on the development of continual learning frameworks for use in machine learning, specifically in the applied context of High Energy Physics (HEP). Machine learning (ML) is a transformative technology by which computers, typically through the use of neural networks, are able to perform tasks with proficiency that rivals or surpasses that of human users. Model Degradation & Catastrophic Forgetting are two undesired phenomena which can occur in ML where the performance of a model degrades when either deployed on novel data streams, or trained on novel data which are sufficiently different than the data the models were initially trained on. A natural example where these sorts of effects can be observed is in the performance of detectors in harsh environments, where the detector signature may change over the lifetime of the detector as it ages and deteriorates — precisely what occurs in the experiments conducted in HEP. Real world HEP data is therefore an excellent test-ground and use-case for Continual Learning paradigms, which are techniques used in ML to counteract these problems. Ensemble learning is one such technique, where multiple smaller models are trained on subsets of the overall data and are ensembled together during inference. The intuition behind this technique is that, although there are shifts in the distributions which govern the incoming data streams, these shifts are not expected to be homogeneous or global. If a sufficient diversity in solutions within the various sub-models has been achieved, then at least one sub-model is expected to retain its performance within the overall ensemble. One further strength of this approach is that the architectures of the various models do not need to be identical, and in fact even different modalities of data can naturally be combined in this way. This work focused on applying ensemble learning techniques to derive results using two main datasets, anomaly detection in HEP data & time-series forecasting in semiconductor manufacturing data. Semiconductor manufacturing involves data with surprising similarity to that of HEP (e.g. wafer maps look very similar to digi-occupancy maps) and Cerium Lab’s prominence within the semiconductor industry makes semiconductor manufacturing a natural opportunity for commercialization of this work. Our efforts have led to two strong results. The first is that we evaluated the proposed ensembling techniques using previously proposed machine learning architectures for use in anomaly detection, namely AutoEncoder based models and their derivatives. We also developed new architectures which have not been evaluated in this context before. In fact, this work marks the first use of Vision Transformers for anomaly detection in HEP. Second, we demonstrated that ensemble learning significantly improves model performance in scenarios prone to degradation, validating its effectiveness across both HEP and semiconductor datasets. These results further support ensemble learning as a powerful strategy for mitigating catastrophic forgetting and maintaining robust performance in evolving data environments.
Low-temperature plasmas (LTPs) are essential to manufacturing devices in the semiconductor industry, from creating extreme ultraviolet photons used in the most advanced lithography to thin film etching, deposition, and surface modifications. It is estimated that 40%–45% of all process steps needed to manufacture semiconductor devices use LTPs in one form or another. LTPs have been an enabling technology in the multidecade progression of the shrinking of device dimensions, often referred to as Moore’s law. New challenges in circuit and device design, novel materials, and increasing demands to achieve environmentally benign processing technologies require advances in plasma technology beyond the current state-of-the-art. The Department of Energy Office of Science Fusion Energy Sciences held a workshop titled Plasma Science for Microelectronics Nanofabrication in August 2022 to discuss the plasma science challenges and technical barriers that need to be overcome to continue to develop the innovative plasma technologies required to support and advance the semiconductor industry. One of the key outcomes of the workshop was identifying a set of priority research opportunities (PROs) to focus attention on the most strategic plasma science challenges to address to benefit the semiconductor industry. For each PRO, scientific challenges and recommended strategies to address those challenges were identified. Furthermore, this article summarizes the PROs identified by the workshop participants.
Majorana zero modes are predicted to emerge in semiconductor/ superconductor interfaces, such as InAs/Al. Majorana modes could be utilized for fault tolerant topological qubits. However, their realization is hindered by materials challenges. The coupling between the superconductor and the semiconductor may be too strong for Majorana modes to emerge, due to effective doping of the semiconductor by the metallic contact. This could be mediated by adding a tunnel barrier of controlled thickness. We use density functional theory (DFT) with Hubbard U corrections, whose values are machine-learned via Bayesian optimization (BO), to assess ZnTe and CdSe as prospective tunnel barriers for the InAs/Al interface. The results of DFT +U(BO) for ZnTe are validated by comparison to angle resolved photoemission spectroscopy (ARPES). We then study bilayer interfaces of the three semiconductors with each other and with Al, as well as trilayer interfaces with a varying number of ZnTe or CdSe layers inserted between InAs and Al. We find that 16 atomic layers of either material completely insulate the InAs from metal induced gap states (MIGS). However, ZnTe and CdSe differ significantly in their band alignment, such that ZnTe forms an effective barrier for electrons, whereas CdSe forms a barrier for holes. Because of Fermi level pinning in the conduction band at the interface, only electron transport is relevant for InAs-based Majorana devices. Therefore, ZnTe is the better choice. Based on the results of our simulations, we suggest conducting experiments with ZnTe barriers in the thickness range of 6–18 atomic layers.
The end of Dennard scaling, which facilitated proportional increases in computing power without added energy costs until the mid-2000s, has underscored the urgent need for innovative semiconductor devices that can enhance energy efficiency. Tunnel field-effect transistors (TFETs) have emerged as promising candidates to surpass the energy efficiency of conventional metal oxide semiconductor field-effect transistors (MOSFETs). Unlike MOSFETs, which rely on thermionic emission to overcome the source-channel potential barrier, TFETs operate through quantum tunneling, potentially enabling sub-60 mV dec −1 subthreshold swing (SS) for low-voltage operation. However, lateral TFETs have faced challenges in achieving adequate on-state current (I ON ) and a broad SS operation window, limiting their practical utility. This review article advocates for areal TFETs, which utilize face-to-face tunnel junctions that ideally offer step-function current turn-on characteristics and allow I ON to scale with device area rather than width. We highlight recent advancements in integrating 2D materials into tunneling structures, which could facilitate efficient band-to-band tunneling through atomically thin layers, while addressing challenges of gate field screening. We then discuss the nearer-term prospects of epitaxial areal TFETs comprising III–V compound semiconductors and group-IV semiconductors based on recent experimental progress. The review examines both quantum mechanical and semiclassical modeling approaches for TFETs, including techniques to reduce the computational complexity. The article delves into ongoing challenges in material synthesis, interface engineering, device fabrication, and integration pathways, concluding with recommendations for future research directions to overcome the fundamental power density limitations of conventional transistor technology.