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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 271 records · Page 15

Fuel spray diagnostics

Several laser measurement methods are being studied to provide the capability to make droplet size and velocity measurements under a variety of spray conditions. The droplet sizing interferometer (DSI) promises to be a successful technique because of its capability for rapid data acquisition, compilation and analysis. Its main advantage is the ability to obtain size and velocity measurements in air-fuel mixing studies and hot flows. The existing DSI at NASA Lewis is a two-color, two-component system. Two independent orthogonal measurements of size and velocity components can be made simultaneously. It also uses an off-axis large-angle light scatter detection. The fundamental features of the system are optics, signal processing and data management system. The major component includes a transmitter unit, two receiver units, two signal processors, two data management systems, two Bragg cell systems, two printer/plotters, a laser, power supply and color monitor.

Bosque, M. A.↗

A high-accuracy optical linear algebra processor for finite element applications

Optical linear processors are computationally efficient computers for solving matrix-matrix and matrix-vector oriented problems. Optical system errors limit their dynamic range to 30-40 dB, which limits their accuray to 9-12 bits. Large problems, such as the finite element problem in structural mechanics (with tens or hundreds of thousands of variables) which can exploit the speed of optical processors, require the 32 bit accuracy obtainable from digital machines. To obtain this required 32 bit accuracy with an optical processor, the data can be digitally encoded, thereby reducing the dynamic range requirements of the optical system (i.e., decreasing the effect of optical errors on the data) while providing increased accuracy. This report describes a new digitally encoded optical linear algebra processor architecture for solving finite element and banded matrix-vector problems. A linear static plate bending case study is described which quantities the processor requirements. Multiplication by digital convolution is explained, and the digitally encoded optical processor architecture is advanced.

Casasent, D.↗

Instrumentation & Data Acquisition System (D AS) Engineer

The primary job of an Instrumentation and Data Acquisition System (DAS) Engineer is to properly measure physical phenomenon of hardware using appropriate instrumentation and DAS equipment designed to record data during a specified test of the hardware. A DAS system includes a CPU or processor, a data storage device such as a hard drive, a data communication bus such as Universal Serial Bus, software to control the DAS system processes like calibrations, recording of data and processing of data. It also includes signal conditioning amplifiers, and certain sensors for specified measurements. My internship responsibilities have included testing and adjusting Pacific Instruments Model 9355 signal conditioning amplifiers, writing and performing checkout procedures, writing and performing calibration procedures while learning the basics of instrumentation.

Jackson, Markus Deon↗

Earth observation data systems in the 1980's

The requirements for future data systems for earth resource observation data are examined. Estimates are made for both expected data volumes and data delivery requirements. Research and development activities presently underway are described, including (1) high-speed processors such as the massively parallel processor; (2) data storage systems, including optical disk configurations and (3) distributed data systems such as high-speed local networks and the applications data service system.

Bracken, P. A.↗

Proposed data compression schemes for the Galileo S-band contingency mission

The Galileo spacecraft is currently on its way to Jupiter and its moons. In April 1991, the high gain antenna (HGA) failed to deploy as commanded. In case the current efforts to deploy the HGA fails, communications during the Jupiter encounters will be through one of two low gain antenna (LGA) on an S-band (2.3 GHz) carrier. A lot of effort has been and will be conducted to attempt to open the HGA. Also various options for improving Galileo's telemetry downlink performance are being evaluated in the event that the HGA will not open at Jupiter arrival. Among all viable options the most promising and powerful one is to perform image and non-image data compression in software onboard the spacecraft. This involves in-flight re-programming of the existing flight software of Galileo's Command and Data Subsystem processors and Attitude and Articulation Control System (AACS) processor, which have very limited computational and memory resources. In this article we describe the proposed data compression algorithms and give their respective compression performance. The planned image compression algorithm is a 4 x 4 or an 8 x 8 multiplication-free integer cosine transform (ICT) scheme, which can be viewed as an integer approximation of the popular discrete cosine transform (DCT) scheme. The implementation complexity of the ICT schemes is much lower than the DCT-based schemes, yet the performances of the two algorithms are indistinguishable. The proposed non-image compression algorith is a Lempel-Ziv-Welch (LZW) variant, which is a lossless universal compression algorithm based on a dynamic dictionary lookup table. We developed a simple and efficient hashing function to perform the string search.

Cheung, Kar-Ming↗

Automation of Data Traffic Control on DSM Architecture

The design of distributed shared memory (DSM) computers liberates users from the duty to distribute data across processors and allows for the incremental development of parallel programs using, for example, OpenMP or Java threads. DSM architecture greatly simplifies the development of parallel programs having good performance on a few processors. However, to achieve a good program scalability on DSM computers requires that the user understand data flow in the application and use various techniques to avoid data traffic congestions. In this paper we discuss a number of such techniques, including data blocking, data placement, data transposition and page size control and evaluate their efficiency on the NAS (NASA Advanced Supercomputing) Parallel Benchmarks. We also present a tool which automates the detection of constructs causing data congestions in Fortran array oriented codes and advises the user on code transformations for improving data traffic in the application.

Frumkin, Michael↗

Distributed memory compiler methods for irregular problems: Data copy reuse and runtime partitioning

Outlined here are two methods which we believe will play an important role in any distributed memory compiler able to handle sparse and unstructured problems. We describe how to link runtime partitioners to distributed memory compilers. In our scheme, programmers can implicitly specify how data and loop iterations are to be distributed between processors. This insulates users from having to deal explicitly with potentially complex algorithms that carry out work and data partitioning. We also describe a viable mechanism for tracking and reusing copies of off-processor data. In many programs, several loops access the same off-processor memory locations. As long as it can be verified that the values assigned to off-processor memory locations remain unmodified, we show that we can effectively reuse stored off-processor data. We present experimental data from a 3-D unstructured Euler solver run on iPSC/860 to demonstrate the usefulness of our methods.

Das, Raja↗

Biaxial fatigue properties of thin-walled composite tubes

A testing method for obtaining fatigue and fracture data under biaxial loading and for negative R-ratios is described. Thin-walled tubes of 1-in. outer nominal diameter with a tapered grip section were tested in an Axial-Torsion Servohydraulic Testing Machine with a 463 Data Control Processor at frequencies below 10 Hz up to the 1-million cycle range. Room temperature, uniaxial constant amplitude fatigue data for high temperature cure graphite-epoxy material are presented at R = -0.4 for a (+, - 5 deg) fiber orientation. The fatigue curve is almost horizontal. Tests on (+, - 5 deg) 'SP-328' resulted in failures which predominantly originated in the grip section. Presently, a new specimen design is being tested intended to eliminate cracking in the grip section. Biaxial in-phase loading of (0/+, - 45) tubes of Fiberite graphite-epoxy resulted in much steeper fatigue curves than observed under uniaxial loading.

Krempl, E.↗

Twos-complement data processing form improved encoded matrix-vector processors

A new method for handling bipolar data by twos-complement representation is detailed. This technique requires fewer bits, uses simpler optical processor devices (fewer channels), and provides a higher processing rate and throughput. It is directly extendable to more complex matrix operations because of its data flow property and requires only a modest increase in the complexity of the digital support system.

Taylor, B. K.↗

Avoiding and tolerating latency in large-scale next-generation shared-memory multiprocessors

A scalable solution to the memory-latency problem is necessary to prevent the large latencies of synchronization and memory operations inherent in large-scale shared-memory multiprocessors from reducing high performance. We distinguish latency avoidance and latency tolerance. Latency is avoided when data is brought to nearby locales for future reference. Latency is tolerated when references are overlapped with other computation. Latency-avoiding locales include: processor registers, data caches used temporally, and nearby memory modules. Tolerating communication latency requires parallelism, allowing the overlap of communication and computation. Latency-tolerating techniques include: vector pipelining, data caches used spatially, prefetching in various forms, and multithreading in various forms. Relaxing the consistency model permits increased use of avoidance and tolerance techniques. Each model is a mapping from the program text to sets of partial orders on program operations; it is a convention about which temporal precedences among program operations are necessary. Information about temporal locality and parallelism constrains the use of avoidance and tolerance techniques. Suitable architectural primitives and compiler technology are required to exploit the increased freedom to reorder and overlap operations in relaxed models.

Probst, David K.↗

Software Processes SAR Motion-Measurement Data

Motion Measurement Processor (MMP) is one of three computer programs that are used together in the operation of a terrain-mapping dual-frequency interferometric synthetic-aperture-radar (SAR) system. The other two programs - Jurassicprok and Calibration Processor - are described in the two immediately preceding articles. MMP acquires all the motion and attitude data collected by onboard instrumentation systems, including radar, laser and camera metrology, inertial navigation systems, and Global Positioning System (GPS) receivers. MMP combines all this information and processes it into all the trajectory information needed to run Jurassicprok, which performs the interferometric processing and mapping functions. MMP includes several Kalman filters for combining and smoothing aircraft motion and attitude data, and least-squares inversion and filtering software tools for solving for interferometric baseline lengths. MMP synchronizes the motion and radar data. It combines the various measurement data into a unified, seven-dimensional reference system and puts out the resulting filtered trajectory and attitude data along with instructions for use of the data by Jurassicprok, as well as the command files used to operate Jurassicprok.

Freedman, Adam↗

A scheme for supporting automatic data migration on multicomputers

A data migration mechanism is proposed that allows an explicit and controlled mapping of data to memory. While read or write copies of each data element can be assigned to any processor's memory, longer term storage of each data element is assigned to a specific location in the memory of a particular processor. Data is presented that suggests that the scheme may be a practical method for efficiently supporting data migration.

Mirchandaney, Seema↗

Reusing Information Management Services for Recommended Decadal Study Missions to Facilitate Aerosol and Cloud Studies

NASA Earth Sciences Division (ESD) has made great investments in the development and maintenance of data management systems and information technologies, to maximize the use of NASA generated Earth science data. With information management system infrastructure in place, mature and operational, very small delta costs are required to fully support data archival, processing, and data support services required by the recommended Decadal Study missions. This presentation describes the services and capabilities of the Goddard Space Flight Center (GSFC) Earth Sciences Data and Information Services Center (GES DISC) and the reusability for these future missions. The GES DISC has developed a series of modular, reusable data management components currently in use. They include data archive and distribution (Simple, Scalable, Script-based, Science [S4] Product Archive aka S4PA), data processing (S4 Processor for Measurements aka S4PM), data search (Mirador), data browse, visualization, and analysis (Giovanni), and data mining services. Information management system components are based on atmospheric scientist inputs. Large development and maintenance cost savings can be realized through their reuse in future missions.

Kempler, Steve↗

Visualization Co-Processing of a CFD Simulation

OVERFLOW, a widely used CFD simulation code, is combined with a visualization system, pV3, to experiment with an environment for simulation/visualization co-processing on a SGI Origin 2000 computer(O2K) system. The shared memory version of the solver is used with the O2K 'pfa' preprocessor invoked to automatically discover parallelism in the source code. No other explicit parallelism is enabled. In order to study the scaling and performance of the visualization co-processing system, sample runs are made with different processor groups in the range of 1 to 254 processors. The data exchange between the visualization system and the simulation system is rapid enough for user interactivity when the problem size is small. This shared memory version of OVERFLOW, with minimal parallelization, does not scale well to an increasing number of available processors. The visualization task takes about 18 to 30% of the total processing time and does not appear to be a major contributor to the poor scaling. Improper load balancing and inter-processor communication overhead are contributors to this poor performance. Work is in progress which is aimed at obtaining improved parallel performance of the solver and removing the limitations of serial data transfer to pV3 by examining various parallelization/communication strategies, including the use of the explicit message passing.

Vaziri, Arsi↗

Data Concentrator

Orbital Research, Inc., developed, built, and tested three high-temperature components for use in the design of a data concentrator module in distributed turbine engine control. The concentrator receives analog and digital signals related to turbine engine control and communicates with a full authority digital engine control (FADEC) or high-level command processor. This data concentrator follows the Distributed Engine Controls Working Group (DECWG) roadmap for turbine engine distributed controls communication development that operates at temperatures at least up to 225 C. In Phase I, Orbital Research developed detailed specifications for each component needed for the system and defined the total system specifications. This entailed a combination of system design, compiling existing component specifications, laboratory testing, and simulation. The results showed the feasibility of the data concentrator. Phase II of this project focused on three key objectives. The first objective was to update the data concentrator design modifications from DECWG and prime contractors. Secondly, the project defined requirements for the three new high-temperature, application-specific integrated circuits (ASICs): one-time programmable (OTP), transient voltage suppression (TVS), and 3.3V. Finally, the project validated each design by testing over temperature and under load.

Willett, Mike↗