Investigation of new concepts of adaptive devices Quarterly technical report, 3 Dec. 1968 - 2 Mar. 1969
Conduction mechanisms and transient behavior of memory device using semiconductor devices
Lewis, E.↗
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A broad-host-range event detector: expanding and quantifying performance between Escherichia coli and Pseudomonas species
Modern microbial biodesign relies on the principle that well-characterized genetic parts can be reused and reconfigured for different functions. However, this paradigm has only been successful in a limited set of hosts, mostly comprised from common lab strains of Escherichia coli . It is clear that new applications such as chemical sensing and event logging in complex environments will benefit from new host chassis. This study quantitatively compared how the same chemical event logger performed across four strains and three different microbial species. An integrase-based sensor and memory device was operated by two representative soil Pseudomonads— Pseudomonas fluorescens SBW25 and Pseudomonas putida DSM 291. Quantitative comparisons were made between these two non-traditional hosts and two benchmark E. coli chassis including the probiotic Nissle 1917 and common cloning strain DH5α. The performance of sensor and memory components changed according to each host, such that a clear chassis effect was observed and quantified. These results were obtained via fluorescence from reporter proteins that were transcriptionally fused to the integrase and downstream recombinant region and via data-driven kinetic models. The Pseudomonads proved to be acceptable chassis for the operation of this event logger, which outperformed the common E. coli DH5α in many ways. This study advances an emerging frontier in synthetic biology that aims to build broad-host-range devices and understand the context by which different species can execute programmable genetic operations.
59 BASIC BIOLOGICAL SCIENCES↗
Self-organized titanium oxide nano-channels for resistive memory application
Towards developing next generation scalable TiO{sub 2}-based resistive switching (RS) memory devices, the efficacy of 50 keV Ar{sup +}-ion irradiation to achieve self-organized nano-channel based structures at a threshold fluence of 5 × 10{sup 16} ions/cm{sup 2} at ambient temperature is presented. Although x-ray diffraction results suggest the amorphization of as-grown TiO{sub 2} layers, detailed transmission electron microscopy study reveals fluence-dependent evolution of voids and eventual formation of self-organized nano-channels between them. Moreover, gradual increase of TiO/Ti{sub 2}O{sub 3} in the near surface region, as monitored by x-ray photoelectron spectroscopy, establishes the upsurge in oxygen deficient centers. The impact of structural and chemical modification on local RS behavior has also been investigated by current-voltage measurements in conductive atomic force microscopy, while memory application is manifested by fabricating Pt/TiO{sub 2}/Pt/Ti/SiO{sub 2}/Si devices. Finally, the underlying mechanism of our experimental results has been analyzed and discussed in the light of oxygen vacancy migration through nano-channels.
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
Device Feasibility Analysis of Multi-level FeFETs for Neuromorphic Computing
As an emerging non-volatile memory device technology, Ferroelectric Field-Effect Transistors (FeFETs) can enable low-power, adaptive intelligent system design. However, device dimension and operating voltage dependent reliability issues of scaled FeFETs can ultimately lead to degraded performance in solving machine learning tasks. In this article, detailed experimental characterization of FeFET devices of different dimensions have been carried out to explicitly evaluate the non-ideal behavior in device conductance programming properties like number of programming states, cycle-to-cycle (C2C) variations, device-to-device (D2D) variations, and state retention. A hardware-aware software simulation approach has been adopted to capture the adversarial effects of the non-idealities on recognition accuracy through algorithm-level performance assessment by including them in NeuroSim, a popular neural network hardware simulator, to execute a neural network model considering all other hardware constraints. With the added non-idealities, significant accuracy degradation has been observed compared to the ideal scenarios where D2D variations play the most critical role. Thereafter, feasibility of a variation-aware training method has been evaluated to tackle the accuracy drop.
42 ENGINEERING↗
Design and testing of the first 2D Prototype Vertically Integrated Pattern Recognition Associative Memory
An associative memory-based track finding approach has been proposed for a Level 1 tracking trigger to cope with increasing luminosities at the LHC. The associative memory uses a massively parallel architecture to tackle the intrinsically complex combinatorics of track finding algorithms, thus avoiding the typical power law dependence of execution time on occupancy and solving the pattern recognition in times roughly proportional to the number of hits. This is of crucial importance given the large occupancies typical of hadronic collisions. The design of an associative memory system capable of dealing with the complexity of HL-LHC collisions and with the short latency required by Level 1 triggering poses significant, as yet unsolved, technical challenges. For this reason, an aggressive R&D program has been launched at Fermilab to advance state of-the-art associative memory technology, the so called VIPRAM (Vertically Integrated Pattern Recognition Associative Memory) project. The VIPRAM leverages emerging 3D vertical integration technology to build faster and denser Associative Memory devices. The first step is to implement in conventional VLSI the associative memory building blocks that can be used in 3D stacking, in other words, the building blocks are laid out as if it is a 3D design. In this paper, we report on the first successful implementation of a 2D VIPRAM demonstrator chip (protoVIPRAM00). The results show that these building blocks are ready for 3D stacking.
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
Study of the photovoltaic effect in thin film barium titanate
The photoelectric effect in structures consisting of metal deposited barium titanate film silicon is described. A radio frequency sputtering technique is used to deposit ferroelectric barium titantate films on silicon and quartz. Film properties are measured and correlated with the photoelectric effect characteristics of the films. It was found that to obtain good quality pin hole free films, it is necessary to reduce the substrate temperature during the last part of the deposition. The switching ability of the device with internal applied voltage is improved when applied with a ferroelectric memory device.
Grannemann, W. W.↗
Programmable stream prefetch with resource optimization
A stream prefetch engine performs data retrieval in a parallel computing system. The engine receives a load request from at least one processor. The engine evaluates whether a first memory address requested in the load request is present and valid in a table. The engine checks whether there exists valid data corresponding to the first memory address in an array if the first memory address is present and valid in the table. The engine increments a prefetching depth of a first stream that the first memory address belongs to and fetching a cache line associated with the first memory address from the at least one cache memory device if there is not yet valid data corresponding to the first memory address in the array. The engine determines whether prefetching of additional data is needed for the first stream within its prefetching depth. The engine prefetches the additional data if the prefetching is needed.
97 MATHEMATICS AND COMPUTING↗
Systems and methods for enhanced power system model validation
A system for enhanced power system model validation is provided. The system includes a computing device including at least one processor in communication with at least one memory device. The at least one processor is programmed to store a plurality of models for a plurality of devices and a plurality of input files associated with the plurality of models, receive, from a user, a selection of model of the plurality of models to simulate, retrieve one or more input files of the plurality of input files, perform a model validity check on the selected model, if the selected model passed the model validity check, perform a model calibration on the selected model, and if the selected model passed the model calibration, perform a post evaluation on the selected model.
Wang, Honggang↗
LC-MEMENTO: A Memory Model for Accelerated Architectures
With the advent of heterogeneous architectures, in particular, with the ubiquity of multi-GPU systems, it is becoming increasingly important to manage device memory efficiently in order to reap the benefits of the additional core count. To date, such responsibility mainly falls on the programmer where device-to-host data communication (and vice versa), if not done properly, may incur costly memory transfer operations and synchronization. The problem may be compounded by additional requirement to maintain system-wide memory consistency that may involve expensive synchronization overhead. In this paper, we present Location Consistency Memory Model for Enhanced Transfer Operations (LC-MEMENTO). This framework considers incorporating runtime techniques for multi-GPU memory management to support relaxed synchronization semantics and memory transfer operations automatically. Specifically, we implement a relaxed form of a memory consistency model based on the Location Consistency (LC) in an Asynchronous Many-Task Runtime (ARTS) and demonstrate that, this memory model enables additional optimization opportunities for the three representative applications encompassing different computational patterns (scientific computation, graphs, data streaming, etc.).
Memory Models, Accelerators, Adaptive Optimization↗
Magnetic force microscopy revealing long-range room temperature stable molecule bridge-induced magnetic ordering on magnetic tunnel junction (MTJ) pillars
Magnetic tunnel junctions (MTJs) can integrate novel single molecular device elements to overcome long-standing fabrication challenges, thus unlocking their novel potential. This study employs magnetic force microscopy (MFM) to demonstrate that organometallic molecules, when placed between two ferromagnetic electrodes along cross-junction shaped MTJ edges, dramatically altered the magnetic properties of the electrodes, affecting areas several hundred microns in size around the molecular junction vicinity at room temperature. These findings are supported by magnetic resonance and magnetometer studies on ∼7000 MTJ pillars. MFM on the pillar sample showed an almost complete disappearance of the magnetic contrast. The spatial magnetic image suggests that molecular channels significantly impacted the spin density of states in the ferromagnetic electrodes. This advancement in MTJ-based molecular devices paves the way for a new generation of commercially viable logic and memory devices controlled by molecular quantum states at near-room temperatures.
Tyagi, Pawan (ORCID:0000000275411344)↗
Nonvolatile Memory Technology for Space Applications
This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.
Oldham, Timothy R.↗
Magnon confinement in epitaxial antiferromagnetic oxide heterostructures.
Magnons, the quanta of spin waves, have been extensively studied in a range of materials for spintronics, particularly for non-volatile logic-in-memory devices. Controlling magnons in conventional antiferromagnets and harnessing them in practical applications, however, remains a challenge. Here, we demonstrate highly efficient magnon transport in a LaFeO3/ BiFeO3/ LaFeO3 all-antiferromagnetic system, which can be controlled electrically, making it highly desirable for energy-efficient computation. Leveraging spin-orbit-driven spin-charge transduction, we demonstrate that this material architecture permits magnon confinement in ultrathin antiferromagnets, enhancing the output voltage generated by magnon transport by several orders of magnitude, which provides a pathway to enable magnetoelectric memory and logic functionalities. Additionally, the non-volatility of output voltage enables ultralowpower logic-in-memory processing, where magnonic devices can be efficiently reconfigured via electrically controlled magnon spin currents within magnetoelectric channels.
Husain, Sajid↗
Investigation of new concepts of adaptive devices Quarterly technical report, 15 Dec. 1967 - 14 Mar. 1968
Fabrication, properties, and application of metal nitride semiconductor/variable threshold transistor memory device
Cohn, M.↗
Storing Data In Circulating Electrons
Proposed memory device contains electrons traveling in circular orbit in vacuum. Orientations of electron spins (up or down) represents binary ones or zeros, respectively. Assuming length of each memory element 100 times classical fictitious electron radius, device theoretically capable of storing 446 gigabytes of data per meter of circumference of orbit.
Eastman, Ted R.↗
Interactions Enhance Ramp Reversal Memory in Locally Phase Separated Materials
The ramp-reversal memory (RRM) effect in metal–insulator transition metal oxides (TMOs), a non-volatile resistance change induced by repeated temperature cycling, has attracted considerable interest in neuromorphic computing and non-volatile memory devices. Our previous defect motion model successfully explained RRM in vanadium dioxide (VO 2 ), capturing observed critical temperature shifts and memory accumulation throughout the sample. However, this approach lacked interactions between metallic and insulating domains. Here, we extend our model by combining a correlated Random Field Ising Model with defect diffusion-segregation, enabling accurate hysteresis modeling while predicting the relationship between RRM and domain interactions. Our simulations demonstrate that the maximum RRM occurs when the turnaround temperature approaches the inflection point. This peak in RRM vs. turnaround temperature is consistent with prior transport measurements, as well as our own optical measurements reported here. Significantly, we find that increasing nearest-neighbor interactions enhances the maximum memory effect, thus providing a clear mechanism for optimizing RRM performance. Since our model employs minimal assumptions, we predict that RRM should be a widespread phenomenon in materials exhibiting patterned phase coexistence of electronic domains. This work not only advances fundamental understanding of memory behavior in TMOs but also establishes a much-needed theoretical framework for optimizing device applications.
36 MATERIALS SCIENCE↗
Nonvolatile electrochemical memory at 600°C enabled by composition phase separation
Silicon-based microelectronics are limited to ~150°C and therefore not suitable for the extremely high temperatures in aerospace, energy, and space applications. While wide-band-gap semiconductors can provide high-temperature logic, nonvolatile memory devices at high temperatures have been challenging. In this work, we develop a nonvolatile electrochemical memory cell that stores and retains analog and digital information at temperatures as high as 600°C. Through correlative scanning transmission electron microscopy, we show that this high-temperature information retention is a result of composition phase separation between the oxidized and reduced forms of amorphous tantalum oxide. This result demonstrates a memory concept that is resilient at extreme temperatures and reveals phase separation as the principal mechanism that enables nonvolatile information storage in these electrochemical memory cells.
42 ENGINEERING↗
Performance Potential of Mixed Data Management Modes for Heterogeneous Memory Systems
Many high-performance systems now include different types of memory devices within the same compute platform to meet strict performance and cost constraints. Such heterogeneous memory systems often include an upper-level tier with better performance, but limited capacity, and lower-level tiers with higher capacity, but less bandwidth and longer latencies for reads and writes. To utilize the different memory layers efficiently, current systems rely on hardware-directed, memory -side caching or they provide facilities in the operating system (OS) that allow applications to make their own data-tier assignments. Since these data management options each come with their own set of trade-offs, many systems also include mixed data management configurations that allow applications to employ hardware- and software-directed management simultaneously, but for different portions of their address space. Despite the opportunity to address limitations of stand-alone data management options, such mixed management modes are under-utilized in practice, and have not been evaluated in prior studies of complex memory hardware. In this work, we develop custom program profiling, configurations, and policies to study the potential of mixed data management modes to outperform hardware- or software-based management schemes alone. Our experiments, conducted on an Intel ® Knights Landing platform with high-bandwidth memory, demonstrate that the mixed data management mode achieves the same or better performance than the best stand-alone option for five memory intensive benchmark applications (run separately and in isolation), resulting in an average speedup compared to the best stand-alone policy of over 10 %, on average.
Effler, Chad↗
Radiation Test Challenges for Scaled Commerical Memories
As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.
LaBel, Kenneth A.↗