Search NASA⌕ Search

SEARCH · Search NASA

Results for “integrated circuit testing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 289 records · Page 16

An Open-Source Framework for Rapid Validation of Scientific ASICs

Spacely is an open-source framework for the post-silicon validation of analog, digital, and mixed-signal ASICs (Application-Specific Integrated Circuits) which maximizes the reuse of hardware and software, reducing the time taken to achieve meaningful test results. Spacely specifically addresses the needs of small, flexible ASIC design teams commonly found in academia or research institutions which benefit most from sharing the overhead of test stand creation between many unique ASIC designs. Spacely is a set of software, firmware, and design practices. It targets two primary hardware platforms (NI-PXI and Caribou) as well as offering extensible support for bench instruments. Spacely provides a high-level Python interface to all test hardware for accessibility, while also giving more sophisticated teams the opportunity to integrate custom test firmware. The design principles of Spacely are presented in brief. Current documentation is available at https://github.com/SpacelyProject/spacely-docs.

Quinn, Adam [Fermilab]↗

An Open-Source Framework for Rapid Validation of Scientific ASICs

Spacely is an open-source framework for the post-silicon validation of analog, digital, and mixed-signal ASICs (Application-Specific Integrated Circuits) which maximizes the reuse of hardware and software, reducing the time taken to achieve meaningful test results. Spacely specifically addresses the needs of small, flexible ASIC design teams commonly found in academia or research institutions which benefit most from sharing the overhead of test stand creation between many unique ASIC designs. Spacely is a set of software, firmware, and design practices. It targets two primary hardware platforms (NI-PXI and Caribou) as well as offering extensible support for bench instruments. Spacely provides a high-level Python interface to all test hardware for accessibility, while also giving more sophisticated teams the opportunity to integrate custom test firmware. The design principles of Spacely are presented, along with a demonstrative example of using Spacely to test a pixel detector readout ASIC.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Single-Event Effect Testing of the PNI RM3100 Magnetometer for Space Applications

The results of a destructive single-event effect susceptibility radiation test of the PNI RM3100 magnetometer sensor, specifically the MagI 2 C ASIC (application-specific integrated circuit) on the sensor board are presented. The sensor is a low-resource commercial off-the-shelf (COTS) magneto-inductive magnetometer. The device was monitored for destructive events and functional interruptions during exposure to a heavy ion beam at the Lawrence Berkeley National Laboratory's 88′′ Cyclotron. The RM3100 did not experience any destructive single-event effects when irradiated to a total fluence of 1.4 × 10 7 cm −2 at an effective linear energy transfer (LET) of 76.7 MeV cm 2 mg −1 while operated at nominal voltage (3.3 V) and elevated temperature (85 ∘C). When these results are combined with previous total ionizing dose tests showing no failures up to 150 kRad (Si), we conclude that the PNI RM3100 is extremely radiation tolerant and can be used in a variety of space environments.

Mark B. Moldwin↗

Diamond thin film temperature and heat-flux sensors

Diamond film temperature and heat-flux sensors are developed using a technology compatible with silicon integrated circuit processing. The technology involves diamond nucleation, patterning, doping, and metallization. Multi-sensor test chips were designed and fabricated to study the thermistor behavior. The minimum feature size (device width) for 1st and 2nd generation chips are 160 and 5 micron, respectively. The p-type diamond thermistors on the 1st generation test chip show temperature and response time ranges of 80-1270 K and 0.29-25 microseconds, respectively. An array of diamond thermistors, acting as heat flux sensors, was successfully fabricated on an oxidized Si rod with a diameter of 1 cm. Some problems were encountered in the patterning of the Pt/Ti ohmic contacts on the rod, due mainly to the surface roughness of the diamond film. The use of thermistors with a minimum width of 5 micron (to improve the spatial resolution of measurement) resulted in lithographic problems related to surface roughness of diamond films. We improved the mean surface roughness from 124 nm to 30 nm by using an ultra high nucleation density of 10(exp 11)/sq cm. To deposit thermistors with such small dimensions on a curved surface, a new 3-D diamond patterning technique is currently under development. This involves writing a diamond seed pattern directly on the curved surface by a computer-controlled nozzle.

Aslam, M.↗

Loose Particle Detection

PIND, developed by Dunegan/Endevco is an acronym for Particle Impact Noise Detection, a means of finding tiny, loose conductive particles introduced during fabrication of integrated circuits, which sometimes cause system failures. One type of automated system used for PIND testing has undergone a study by Goddard Space Flight Center to determine its effectiveness. Analysis of the test data indicated that an average PIND detection capability of about 45 percent can be expected.

Source record↗

Depth Measurements Using Alpha Particles and Upsettable SRAMs

A custom designed SRAM was used to measure the thickness of integrated circuit over layers and the epi-layer thickness using alpha particles and a test SRAM. The over layer consists of oxide, nitride, metal, and junction regions.

upsettable SRAMs↗

Performance of the QWIP Focal Plane Array for NASA's Landsat 9 Mission

The flight focal plane array (FPA) for the Thermal Infrared Sensor 2 (TIRS-2) instrument, to be flown on Landsat 9, was built and characterized at NASA Goddard Space Flight Center (GSFC). The FPA was assembled using GaAs quantum well infrared photodetector (QWIP) arrays from the same lot as the TIRS instrument on Landsat 8. Each QWIP array is hybridized to an Indigo ISC9803 readout integrated circuit (ROIC) with 640 x 512, 25µm by 25µm pixels. Each QWIP hybrid was tested at the NASA/GSFC Detector Characterization Laboratory (DCL) as a single sensor chip assembly (SCA). The best SCAs in terms of performance were then built up into an FPA consisting of three SCAs, required to provide the necessary 15-degree field of view of the instrument. The FPA was tested to determine if project requirements were being met as a fully assembled unit. The performance of the QWIP SCAs and the fully assembled, NASA flight-qualified FPA will be reviewed.

Quantum well infrared photodiode↗

Case Study: Field Evaluation of a Low-Cost Circuit-Level Electrical Submetering System

Circuit-level metering technologies provide the ability to monitor individual circuits within an electrical panel in a building, providing detailed power and energy consumption data at a much more granular level than was previously achievable in a cost-effective manner. While the fundamental hardware components of circuit-level—split-core current transformers (CTs) and power monitoring meters—have existed for some time, the new offerings in the market have tightly integrated these components, lower costs, and have streamlined data organization, transport, and access via software solutions accessible through web and application programming interfaces (API). NREL evaluated Meazon’s single-circuit metering system. The evaluation of the equipment under test (EUT) focused on three aspects: (1) accuracy of the data provided by the system, (2) ease of installation of this technology and ease of data integration into existing U.S. General Services Administration (GSA) analytics platforms, and (3) total cost of ownership and cost-effectiveness of the technology. The metering technology was tested in a field deployment where it was installed in low and high-voltage commercial electrical panels in the César E. Chávez Memorial Building in Denver, Colorado. The goals were to assess the metering accuracy, the ease of installation and data retrieval, and the total cost of ownership and cost-effectiveness. This technology proved easy to install by a certified electrician who completed the install of 6 meters in 2 separate panels (120/208 V and 277/480 V) and 2 circuit disconnects (along with associated commissioning) at the César E. Chávez Memorial Building in less than one day. The technology was installed in high- and low-voltage panels and with limited space in the electrical room, demonstrating the applicability of this technology to almost all commercial buildings in the GSA portfolio. Primary considerations for this technology include appropriate sizing of CTs for each circuit, selection of loads/circuits/panels that are of high value for detailed submetering (e.g., tailored for high-load devices), and how GSA would like to integrate these data with its existing energy management infrastructure. Through the field evaluation, we demonstrated data integration from the vendor system into the primary software component on the GSA enterprise-level energy management and information system, GSA Link. Data from the circuit-level metering were integrated into this platform and used to perform FDD. This demonstrated the ability of the EUT to augment existing energy management and information systems in buildings where GSA Link is deployed and provides a pathway for delivering FDD at other buildings throughout the portfolio.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

Sliding backshorts for planar circuits

An adjustable planar imbedding circuit based on coplanar transmission lines is presented to deal with the impedance mismatch associated with the use of the Superconductor-Insulator-Superconductor tunnel junction. The planar embedding circuit is developed with movable noncontacting shorting elements that consist of thin metallic plates with optimized arrangements of rectangular holes. The rectangular holes are placed along the insulated metallic transmission line to provide a periodic variation of the line impedance. A large reflection coefficient is demonstrated with a scale model of the sliding backshort, and values of more than -0.5 dB are reported. The shorting elements are incorporated into a low-frequency tuning circuit to test the practical tuning ranges. The backshort can be used to fashion tuning stubs with variable post-fabrication electrical lengths which relaxes the design constraints of planar integrated circuits.

Lubecke, Victor M.↗

Verification and Quantification of Single Event Effects on High Speed SRAM in Terrestrial Environments

As integrated circuits become more sensitive to charged particles and neutrons, anomalous performance due to single event effects (SEE) is a concern and requires experimental verification and quantification. The Center for Applied Radiation Research (CARR) at Prairie View A&M University has developed experiments as a participant in the NASA ER-2 Flight Program, the APEX balloon flight program and the Student Launch Program. Other high altitude and ground level experiments of interest to DoD and commercial applications are being developed. The experiment characterizes the SEE behavior of high speed and high density SRAM's. The system includes a PC-104 computer unit, an optical drive for storage, a test board with the components under test, and a latchup detection and reset unit. The test program will continuously monitor the stored checkerboard data pattern in the SW and record errors. Since both the computer and the optical drive contain integrated circuits, they are also vulnerable to radiation effects. A latchup detection unit with discrete components will monitor the test program and reset the system when necessary. The first results will be obtained from the NASA ER-2 flights, which are now planned to take place in early 1998 from Dryden Research Center in California. The series of flights, at altitudes up to 70,000 feet, and a variety of flight profiles should yield a distribution of conditions for correlating SEES. SEE measurements will be performed from the time of aircraft power-up on the ground throughout the flight regime until systems power-off after landing.

Huff, H.↗

Single-Event Transient Testing of Low Dropout PNP Series Linear Voltage Regulators

As demand for high-speed, on-board, digital-processing integrated circuits on spacecraft increases (field-programmable gate arrays and digital signal processors in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The goal of this task is to perform SET characterization of several commercial POL converters, and provide a discussion of the impact of these results to state-of-the-art digital processing IC through laser and heavy ion testing

Adell, Philippe↗

Single-event transient testing of low dropout PNP series linear voltage regulators

As demand for high-speed, on-board, digital-processing integrated circuits on spacecraft increases (field-programmable gate arrays and digital signal processors in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The goal of this task is to perform SET characterization of several commercial POL converters, and provide a discussion of the impact of these results to state-of-the-art digital processing IC through laser and heavy ion testing

Allen, Gregory↗

Tamper-Indicating Enclosures with Visually Obvious Tamper Response (Final Project Report)

Sandia National Laboratories is developing a new method for detecting penetration of tamper - indicating enclosures (TIEs). This method incorporates the use of "bleeding" materials (analogous to visually obvious, colorful bruised skin that doesn't heal) into the design of TIEs. As designed, it will allow inspectors to use simple visual observation to detect attempts to penetrate the external surfaces of a TIE, without providing adversaries the ability to repair damage. A material of this type can enhance tamper indication of current TIEs used to support treaty verification regimes. Current TIE inspections are time - consuming and rely on subjective visual assessment by an inspector, equipment such as eddy current or camera devices, or involve approaches that may be limited due to application environment. The complexities and requirements that volumetric sealing methods (or TIEs) must address are: (1) enclosures that are non - standard in size/shape; (2) enclosures that may be inspectorate - or facility - owned; (3) finding tamper attempts that are difficult and time consuming for an inspector to locate; (4) enclosures that are reliable and durable enough to survive the conditions that exist in the operating environment (including facility handling); and (5) methods that prevent adversaries from repairing penetrations. Early project R&D [1] focused on encapsulated transition metals. Due to the challenges associated with the transition metal - based approach, a mitigation approach was investigated resulting in two separate research paths — one that involves fabricating custom TIE molds that meet the specific (size and shape) needs of safeguards equipment a nd one that can be deployed as a sprayed on or painted coating to an existing TIE or surface. The "custom mold" approach is based on creating thin layers of materials that , when penetrated, expose an inner material to O 2 which causes an irreversible color change. The "in-situ coating" approach is based on applying a sensor solution containing color changing microcapsules that bleed when the microcapsule is ruptured. The anticipated benefits of this work are passive, flexible, scalable, robust , cost-effective TIEs with visually obvious responses to tamper attempts. This provides more efficient and effective monitoring , as inspectors will require little or no additional equipment and will be able to detect tamper without extensive time - consuming visual examination. Applications include custom TIEs (cabinets , equipment enclosures or seal bodies ), or spray-coating/painting onto facility-owned items, walls or structures, or circuit boards. The paper describes research and testing completed to-date on the method and integration of select system components.

36 MATERIALS SCIENCE↗

Single Event Effects in Highly Scaled Devices for Space Applications

This paper discusses single-event upset (SEU) in memories and microprocessors that are the "drivers" of highly scaled commercial integrated circuits. Despite the decrease in critical charge that occurs for highly scaled CMOS devices, recent test data has shown that SEU rates are actually somewhat lower for scaled devices compared to older devices with larger feature size. Hard errors, which are increasingly important for memories, are discussed along with conventional soft errors. Functional errors in memories and microprocessors are particularly significant, and tend to dominate the response of highly scaled devices from an application standpoint. Predictions for future devices are made using the Semiconductor Industry Roadmap along with recent modeling and radiation test results.

microelectronics↗

Passively Shunted Piezoelectric Damping of Centrifugally-Loaded Plates

Researchers at NASA Glenn Research Center have been investigating shunted piezoelectric circuits as potential damping treatments for turbomachinery rotor blades. This effort seeks to determine the effects of centrifugal loading on passively-shunted piezoelectric - damped plates. Passive shunt circuit parameters are optimized for the plate's third bending mode. Tests are performed both non-spinning and in the Dynamic Spin Facility to verify the analysis, and to determine the effectiveness of the damping under centrifugal loading. Results show that a resistive shunt circuit will reduce resonant vibration for this configuration. However, a tuned shunt circuit will be required to achieve the desired damping level. The analysis and testing address several issues with passive shunt circuit implementation in a rotating system, including piezoelectric material integrity under centrifugal loading, shunt circuit implementation, and tip mode damping.

Duffy, Kirsten P.↗

Data Concentrator

Orbital Research, Inc., developed, built, and tested three high-temperature components for use in the design of a data concentrator module in distributed turbine engine control. The concentrator receives analog and digital signals related to turbine engine control and communicates with a full authority digital engine control (FADEC) or high-level command processor. This data concentrator follows the Distributed Engine Controls Working Group (DECWG) roadmap for turbine engine distributed controls communication development that operates at temperatures at least up to 225 C. In Phase I, Orbital Research developed detailed specifications for each component needed for the system and defined the total system specifications. This entailed a combination of system design, compiling existing component specifications, laboratory testing, and simulation. The results showed the feasibility of the data concentrator. Phase II of this project focused on three key objectives. The first objective was to update the data concentrator design modifications from DECWG and prime contractors. Secondly, the project defined requirements for the three new high-temperature, application-specific integrated circuits (ASICs): one-time programmable (OTP), transient voltage suppression (TVS), and 3.3V. Finally, the project validated each design by testing over temperature and under load.

Willett, Mike↗

An Integrated 520-600 GHz Sub-Harmonic Mixer and Tripler Combination Based on GaAs MMIC Membrane Planar Schottky Diodes

We present here the design, development and test of an integrated sub-millimeter front-end featuring a 520-600 GHz sub-harmonic mixer and a 260-300 GHz frequency tripler in a single cavity. Both devices used GaAs MMIC membrane planar Schottky diode technology. The sub-harmonic mixer/tripler circuit has been tested using conventional machined as well as silicon micro-machined blocks. Measurement results on the metal block give best DSB mixer noise temperature of 2360 K and conversion losses of 7.7 dB at 520 GHz. Preliminary results on the silicon micro-machined blocks give a DSB mixer noise temperature of 4860 K and conversion losses of 12.16 dB at 540 GHz. The LO input power required to pump the integrated tripler/sub-harmonic mixer for both packages is between 30 and 50 mW.

Monolithic Microwave Integrated Circuit, (MMIC)↗