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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 289 records · Page 16
All sourcesNASA NTRSDOE OSTI
NASA NTRS2019

Inclusion of Radiation Environment Variability for Reliability Estimates for SiC Power MOSFETs

Variability of the solar energetic particle environment is investigated for single-event-burnout reliability of silicon-carbide power metal-oxide-semiconductor field effect transistors. A probabilistic assessment of failure evaluates the benefits of de-rating voltage, shielding, and mission length. The Prediction of Solar particle Yields for Characterizing Integrating Circuits code is used to calculate a cumulative density function for the fluence of the environment. The lethal ion method is then used to determine what proportion of the environment will cause single-event-burnout. The operating voltage determines the lowest linear-energy-transfer particle that will cause single-event-burnout and that should be included in the environment distribution. The shielding and mission length also determine the final environment distribution of the mission fluence. Through calculating the reliability for different operating voltages, shielding, and mission length for a specific device, it is shown that shielding thickness and operating voltage have a large effect on reliability and can be traded off during the design.

Heavy ion↗
NASA NTRS2010

Interim test status report for NEPP scaled CMOS

This document serves as the fiscal year end report for the NEPP scaled complementary metal-oxide semiconductor (CMOS) task. Much of the effort this year focused on development of test capability and initial collection of data on SDRAM devices. Since the system has only just begun (in the last four weeks) to gather data, this report focuses on the test system and preliminary results.

Guertin, Steven M.↗
NASA NTRSDate not supplied

Developing the Future of Gamma-ray Astrophysics with Monolithic Silicon Pixels

This paper explores the potential of AstroPix, a project to develop Complementary Metal Oxide Semiconductor (CMOS) pixels for the next generation of space-based high-energy astrophysics experiments. Multimessenger astrophysics is a rapidly developing field whose upcoming missions need support from new detector technology such as AstroPix. ATLASPix, a monolithic silicon detector optimized for the ATLAS particle detector at CERN, is the beginning of the larger AstroPix project. Energy resolution is a driving parameter in the reconstruction of gamma-ray events, and therefore the characterization of ATLASPix energy resolution is the focus of this paper. The intrinsic energy resolution of the detector exceeded our baseline requirements of 10% at 60 keV. The digital output of ATLASPix results in energy resolutions insufficient to advance gamma-ray astronomy. However, the results from the intrinsic energy resolution indicate the digital capability of the detector can be redesigned, and the next generation of pixels for the larger AstroPix project have already been constructed. Iterations of AstroPix-type pixels are an exciting new technology candidate to support new space-based missions.

Isabella Brewer↗
NASA NTRS1973

Glass encapsulation provides extra protection for IC semiconductor devices

Oxide-passivated semiconductor chip is given protective glass coating by means of vapor deposition over metallic substrate of integrated circuit (IC). Method provides more reliable oxide-passivation and hermetic sealing in current use. Chips and scratches incurred during dicing, testing, and assembly are markedly reduced.

Doelp, W. L., Jr.↗
NASA NTRS1996

Simultaneous Use Of Zr And Mg Anodes In XPS

Improved x-ray source for x-ray photoelectron spectroscopy (XPS) contains both zirconium anode with beryllium window and magnesium anode with aluminum window. Previously unresolvable peaks of electron-energy spectrum become resolvable. Developed specifically for use in analyzing distributions of chemical constituents in surface layers of specimens of 2219 aluminum alloy and in determining the depths of surface oxide layers and relative proportions of aluminum and oxide in layers. Also used to study chemical constituents of surface layers in other material systems - for example, thin oxide films on silicon-based semiconductor devices, oxide films on alloys, and surface layers affecting adhesion of paints or bonding materials.

Allgeyer, D. F.↗
NASA NTRS1989

Variable-Energy Ion Beams For Modification Of Surfaces

Beam of low-energy negative oxygen ions used to grow layer of silicon dioxide on silicon. Beam unique both in purity, contains no molecular oxygen or other charged species, and in low energy, which is insufficient to damage silicon by physically displacing atoms. Low-energy growth accomplished with help of ion-beam apparatus. Directs electrons into crosswise stream of gas, generating stream of negative ions. Pair of charged plates separates ions from accompanying electrons and diverts ion beam to target - silicon substrate. Diameter of beam at target 0.5 to 0.75 cm. Promises useful device to study oxidation of semiconductors and, in certain applications, to replace conventional oxidation processes.

Chutjian, Ara↗
NASA NTRS2023

Ionizing Radiation Effects on Hole Collection Backside-Illuminated P-Type Deep-Trench Pinned Photo-MOS Pixels under Image Acquisition

Dark current degradation, origins, and annealing behavior after x-ray irradiation are studied in a P-type, hole collecting, backside-illuminated image sensor currently being developed at STMicroelectronics and based on deep-trenched photo-MOS pixels. Different biasing conditions during irradiation, i.e. grounded or biased and sequenced, are compared. The dark current increase with total ionizing dose (TID) and the dark current annealing behavior seem to be driven by the backside interface between the P-epitaxy of the pixels and the ONO stack. Despite still being under development, this pixel architecture already exhibits both very good electro-optical performance and a better radiation hardness than pinned photodiode-based CMOS Image sensors that benefit from the same advanced CIS processing technologies. At high total dose range, the photogate challenges custom Radiation-Hardened-by-Design photodiodes by exhibiting a comparable radiation tolerance while bringing new features such as high-resolution or Correlated Double Sampling.

CMOS Image Sensor (CIS)↗
NASA NTRS2010

Scaled CMOS Technology Reliability Users Guide

The desire to assess the reliability of emerging scaled microelectronics technologies through faster reliability trials and more accurate acceleration models is the precursor for further research and experimentation in this relevant field. The effect of semiconductor scaling on microelectronics product reliability is an important aspect to the high reliability application user. From the perspective of a customer or user, who in many cases must deal with very limited, if any, manufacturer's reliability data to assess the product for a highly-reliable application, product-level testing is critical in the characterization and reliability assessment of advanced nanometer semiconductor scaling effects on microelectronics reliability. A methodology on how to accomplish this and techniques for deriving the expected product-level reliability on commercial memory products are provided.Competing mechanism theory and the multiple failure mechanism model are applied to the experimental results of scaled SDRAM products. Accelerated stress testing at multiple conditions is applied at the product level of several scaled memory products to assess the performance degradation and product reliability. Acceleration models are derived for each case. For several scaled SDRAM products, retention time degradation is studied and two distinct soft error populations are observed with each technology generation: early breakdown, characterized by randomly distributed weak bits with Weibull slope (beta)=1, and a main population breakdown with an increasing failure rate. Retention time soft error rates are calculated and a multiple failure mechanism acceleration model with parameters is derived for each technology. Defect densities are calculated and reflect a decreasing trend in the percentage of random defective bits for each successive product generation. A normalized soft error failure rate of the memory data retention time in FIT/Gb and FIT/cm2 for several scaled SDRAM generations is presented revealing a power relationship. General models describing the soft error rates across scaled product generations are presented. The analysis methodology may be applied to other scaled microelectronic products and their key parameters.

Microelectronics Reliability↗
NASA NTRS1966

Complementary MOS transistors.

MOS transistor structures with enhancement mode of operation, discussing fabrication processes via V-C characteristics, temperature effects on performance, etc

CRYSTAL GROWTH↗