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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS2001

Numerical Model of Flame Spread Over Solids in Microgravity: A Supplementary Tool for Designing a Space Experiment

The recently developed numerical model of concurrent-flow flame spread over thin solids has been used as a simulation tool to help the designs of a space experiment. The two-dimensional and three-dimensional, steady form of the compressible Navier-Stokes equations with chemical reactions are solved. With the coupled multi-dimensional solver of the radiative heat transfer, the model is capable of answering a number of questions regarding the experiment concept and the hardware designs. In this paper, the capabilities of the numerical model are demonstrated by providing the guidance for several experimental designing issues. The test matrix and operating conditions of the experiment are estimated through the modeling results. The three-dimensional calculations are made to simulate the flame-spreading experiment with realistic hardware configuration. The computed detailed flame structures provide the insight to the data collection. In addition, the heating load and the requirements of the product exhaust cleanup for the flow tunnel are estimated with the model. We anticipate that using this simulation tool will enable a more efficient and successful space experiment to be conducted.

Shih, Hsin-Yi↗
NASA NTRS2010

Using Multi-Core Systems for Rover Autonomy

Task Objectives are: (1) Develop and demonstrate key capabilities for rover long-range science operations using multi-core computing, (a) Adapt three rover technologies to execute on SOA multi-core processor (b) Illustrate performance improvements achieved (c) Demonstrate adapted capabilities with rover hardware, (2) Targeting three high-level autonomy technologies (a) Two for onboard data analysis (b) One for onboard command sequencing/planning, (3) Technologies identified as enabling for future missions, (4)Benefits will be measured along several metrics: (a) Execution time / Power requirements (b) Number of data products processed per unit time (c) Solution quality

multi-core↗
NASA NTRS2011

Performance Comparison of Wireless Sensor Network Standard Protocols in an Aerospace Environment: ISA100.11a and ZigBee

Wireless Sensor Networks (WSNs) can provide a substantial benefit in spacecraft systems, reducing launch weight and providing unprecedented flexibility by allowing instrumentation capabilities to grow and change over time. Achieving data transport reliability on par with that of wired systems, however, can prove extremely challenging in practice. Fortunately, much progress has been made in developing standard WSN radio protocols for applications from non-critical home automation to mission-critical industrial process control. The relative performances of candidate protocols must be compared in representative aerospace environments, however, to determine their suitability for spaceflight applications. In this paper, we will present the results of a rigorous laboratory analysis of the performance of two standards-based, low power, low data rate WSN protocols: ZigBee Pro and ISA100.11a. Both are based on IEEE 802.15.4 and augment that standard's specifications to build complete, multi-hop networking stacks. ZigBee Pro targets primarily the home and office automation markets, providing an ad-hoc protocol that is computationally lightweight and easy to implement in inexpensive system-on-a-chip components. As a result of this simplicity, however, ZigBee Pro can be susceptible to radio frequency (RF) interference. ISA100.11a, on the other hand, targets the industrial process control market, providing a robust, centrally-managed protocol capable of tolerating a significant amount of RF interference. To achieve these gains, a coordinated channel hopping mechanism is employed, which entails a greater computational complexity than ZigBee and requires more sophisticated and costly hardware. To guide future aerospace deployments, we must understand how well these standards relatively perform in analog environments under expected operating conditions. Specifically, we are interested in evaluating goodput -- application level throughput -- in a representative crewed environment in the presence of varying levels of 802.11g Wi-Fi traffic. To do so, we use the NASA Johnson Space Center Wireless Habitat Testbed (WHT), a metallic, habitation-sized module designed for co-existence testing of wireless systems. In its quiescent state, the sealed WHT provides an RF-quiet environment to which we can selectively add interfering systems; it also provides a realistic level of multi-path self-interference for systems under investigation. In our test, we deploy two representative five node networks, configured in a star topology with all nodes reporting directly to a WSN gateway. Each ZigBee network WSN node is built using a Texas Instruments (TI) CC2530 system-on-a-chip radio running TI's ZigBee Pro Z-stack. Each ISA100.11a network node is built using a Nivis VersaNode 210 system-on-a-chip radio. In both cases, radios interface with TI MSP430-F5438 microcontroller implementing a common test application. Interference is provided by a D-link 802.11g Wi-Fi router transporting traffic generated using the Iperf network testing tool. For the single-channel ZigBee network, effects of both direct and indirect Wi-Fi interference are evaluated. For the channel-hopping ISA100.11a network, effects of interference from multiple Wi-Fi routers configured in non-overlapping 802.11g channels are evaluated. Our results show that, in general, the more lightweight ZigBee network performs well at low interference levels, but performance degrades as interference increases. Conversely, the more complex and costly ISA100.11a network continues to perform well as Wi-Fi interference levels increase.

Wagner, Raymond S.↗
NASA NTRS2004

EHW Approach to Temperature Compensation of Electronics

Efforts are under way to apply the concept of evolvable hardware (EHW) to compensate for variations, with temperature, in the operational characteristics of electronic circuits. To maintain the required functionality of a given circuit at a temperature above or below the nominal operating temperature for which the circuit was originally designed, a new circuit would be evolved; moreover, to obtain the required functionality over a very wide temperature range, there would be evolved a number of circuits, each of which would satisfy the performance requirements over a small part of the total temperature range. The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles, namely, "Reconfigurable Arrays of Transistors for Evolvable Hardware" (NPO-20078), Vol. 25, No. 2 (February 2001), page 36; Evolutionary Automated Synthesis of Electronic Circuits (NPO- 20535), Vol. 26, No. 7 (July 2002), page 37; "Designing Reconfigurable Antennas Through Hardware Evolution" (NPO-20666), Vol. 26, No. 7 (July 2002), page 38; "Morphing in Evolutionary Synthesis of Electronic Circuits" (NPO-20837), Vol. 26, No. 8 (August 2002), page 31; "Mixtrinsic Evolutionary Synthesis of Electronic Circuits" (NPO-20773) Vol. 26, No. 8 (August 2002), page 32; and "Synthesis of Fuzzy-Logic Circuits in Evolvable Hardware" (NPO-21095) Vol. 26, No. 11 (November 2002), page 38. To recapitulate from the cited prior articles: EHW is characterized as evolutionary in a quasi-genetic sense. The essence of EHW is to construct and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The connection and disconnection can be effected by use of field-programmable transistor arrays (FPTAs). The evolution is guided by a search-andoptimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by mathematical modeling (that is, computational simulation) only, tested in real hardware, or tested in combinations of computational simulation and real hardware.

Stoica, Adrian↗
NASA NTRS1992

Scalable parallel communications

Coarse-grain parallelism in networking (that is, the use of multiple protocol processors running replicated software sending over several physical channels) can be used to provide gigabit communications for a single application. Since parallel network performance is highly dependent on real issues such as hardware properties (e.g., memory speeds and cache hit rates), operating system overhead (e.g., interrupt handling), and protocol performance (e.g., effect of timeouts), we have performed detailed simulations studies of both a bus-based multiprocessor workstation node (based on the Sun Galaxy MP multiprocessor) and a distributed-memory parallel computer node (based on the Touchstone DELTA) to evaluate the behavior of coarse-grain parallelism. Our results indicate: (1) coarse-grain parallelism can deliver multiple 100 Mbps with currently available hardware platforms and existing networking protocols (such as Transmission Control Protocol/Internet Protocol (TCP/IP) and parallel Fiber Distributed Data Interface (FDDI) rings); (2) scale-up is near linear in n, the number of protocol processors, and channels (for small n and up to a few hundred Mbps); and (3) since these results are based on existing hardware without specialized devices (except perhaps for some simple modifications of the FDDI boards), this is a low cost solution to providing multiple 100 Mbps on current machines. In addition, from both the performance analysis and the properties of these architectures, we conclude: (1) multiple processors providing identical services and the use of space division multiplexing for the physical channels can provide better reliability than monolithic approaches (it also provides graceful degradation and low-cost load balancing); (2) coarse-grain parallelism supports running several transport protocols in parallel to provide different types of service (for example, one TCP handles small messages for many users, other TCP's running in parallel provide high bandwidth service to a single application); and (3) coarse grain parallelism will be able to incorporate many future improvements from related work (e.g., reduced data movement, fast TCP, fine-grain parallelism) also with near linear speed-ups.

Maly, K.↗
NASA NTRS1976

TSE computers - A means for massively parallel computations

A description is presented of hardware concepts for building a massively parallel processing system for two-dimensional data. The processing system is to use logic arrays of 128 x 128 elements which perform over 16 thousand operations simultaneously. Attention is given to image data, logic arrays, basic image logic functions, a prototype negator, an interleaver device, image logic circuits, and an image memory circuit.

Strong, J. P., III↗
NASA NTRS2000

Basic Electronic Design for Proposed NMSU Hitchhiker Payload

This document presents the bas'c hardware design developed by the EE 499 class during the spring semester of the 1999-2000 academic year. This design covers the electrical components to supply power to the experiments, the computer software and interfaces to control the experiments, and the ground data processing to provide an operator interface. This document is a follow-on to the Payload Mission description document and the System Requirements document developed during the EE 498 class during the fall semester. The design activities are broken down by functional area within the structure. For each area, we give the requirements that need to be met and the design to meet the requirements. For each of these areas, a prototype selection of hardware and/or software was done by the class and the components assembled as part of the class to verify that they worked as intended.

Horan, Stephen↗
NASA NTRS1983

Modified timing module for Loran-C receiver

Hardware documentation is provided for the modified LORAN-C timing module, which uses interrupt-driven software control in determining loop sample times. Computer loading is reduced by eliminating polled operation of the timing loop.

Lilley, R. W.↗
NASA NTRS1987

Modified timing module for Loran-C receiver

Hardware documentation is provided for the modified Loran-C timing module, which used interrupt-driven software control in determing loop sample times. Computer loading is reduced by eliminating polled operation of the timing loop.

Lilley, Robert W.↗
NASA NTRS1990

32 bit digital optical computer - A hardware update

Such state-of-the-art devices as multielement linear laser diode arrays, multichannel acoustooptic modulators, optical relays, and avalanche photodiode arrays, are presently applied to the implementation of a 32-bit supercomputer's general-purpose optical central processing architecture. Shannon's theorem, Morozov's control operator method (in conjunction with combinatorial arithmetic), and DeMorgan's law have been used to design an architecture whose 100 MHz clock renders it fully competitive with emerging planar-semiconductor technology. Attention is given to the architecture's multichannel Bragg cells, thermal design and RF crosstalk considerations, and the first and second anamorphic relay legs.

Guilfoyle, Peter S.↗
NASA NTRS1992

Mathematical model of the Space Shuttle Main Engine gaseous oxygen control valve

A computer program for modeling transient flow behavior of the GOX control valve (GCV) has been developed which makes it possible to model a variety of operating conditions and changes of physical hardware. The SSME GCV controls the flow of GOX that pressurizes the Pogo accumulator. The model simulates the transient flow behavior of the original, tight stacked, and redesigned valve configurations during start and shutdown. The model reads a user-prepared input file that defines the valve configurations and thus provides maximum flexibility.

Langer, Susan L.↗
NASA NTRS1994

PI in the sky: The astronaut science advisor on SLS-2

The Astronaut Science Advisor (ASA, also known as Principal-Investigator-in-a-Box) is an advanced engineering effort to apply expert systems technology to experiment monitoring and control. Its goal is to increase the scientific value of information returned from experiments on manned space missions. The first in-space test of the system will be in conjunction with Professor Larry Young's (MIT) vestibulo-ocular 'Rotating Dome' experiment on the Spacelab Life Sciences 2 mission (STS-58) in the Fall of 1993. In a cost-saving effort, off-the-shelf equipment was employed wherever possible. Several modifications were necessary in order to make the system flight-worthy. The software consists of three interlocking modules. A real-time data acquisition system digitizes and stores all experiment data and then characterizes the signals in symbolic form; a rule-based expert system uses the symbolic signal characteristics to make decisions concerning the experiment; and a highly graphic user interface requiring a minimum of user intervention presents information to the astronaut operator. Much has been learned about the design of software and user interfaces for interactive computing in space. In addition, we gained a great deal of knowledge about building relatively inexpensive hardware and software for use in space. New technologies are being assessed to make the system a much more powerful ally in future scientific research in space and on the ground.

Hazelton, Lyman R.↗
NASA NTRS2002

Field-Programmable Gate Array Computer in Structural Analysis: An Initial Exploration

This paper reports on an initial assessment of using a Field-Programmable Gate Array (FPGA) computational device as a new tool for solving structural mechanics problems. A FPGA is an assemblage of binary gates arranged in logical blocks that are interconnected via software in a manner dependent on the algorithm being implemented and can be reprogrammed thousands of times per second. In effect, this creates a computer specialized for the problem that automatically exploits all the potential for parallel computing intrinsic in an algorithm. This inherent parallelism is the most important feature of the FPGA computational environment. It is therefore important that if a problem offers a choice of different solution algorithms, an algorithm of a higher degree of inherent parallelism should be selected. It is found that in structural analysis, an 'analog computer' style of programming, which solves problems by direct simulation of the terms in the governing differential equations, yields a more favorable solution algorithm than current solution methods. This style of programming is facilitated by a 'drag-and-drop' graphic programming language that is supplied with the particular type of FPGA computer reported in this paper. Simple examples in structural dynamics and statics illustrate the solution approach used. The FPGA system also allows linear scalability in computing capability. As the problem grows, the number of FPGA chips can be increased with no loss of computing efficiency due to data flow or algorithmic latency that occurs when a single problem is distributed among many conventional processors that operate in parallel. This initial assessment finds the FPGA hardware and software to be in their infancy in regard to the user conveniences; however, they have enormous potential for shrinking the elapsed time of structural analysis solutions if programmed with algorithms that exhibit inherent parallelism and linear scalability. This potential warrants further development of FPGA-tailored algorithms for structural analysis.

Singleterry, Robert C., Jr.↗
NASA NTRS2005

Discrete Event Supervisory Control Applied to Propulsion Systems

The theory of discrete event supervisory (DES) control was applied to the optimal control of a twin-engine aircraft propulsion system and demonstrated in a simulation. The supervisory control, which is implemented as a finite-state automaton, oversees the behavior of a system and manages it in such a way that it maximizes a performance criterion, similar to a traditional optimal control problem. DES controllers can be nested such that a high-level controller supervises multiple lower level controllers. This structure can be expanded to control huge, complex systems, providing optimal performance and increasing autonomy with each additional level. The DES control strategy for propulsion systems was validated using a distributed testbed consisting of multiple computers--each representing a module of the overall propulsion system--to simulate real-time hardware-in-the-loop testing. In the first experiment, DES control was applied to the operation of a nonlinear simulation of a turbofan engine (running in closed loop using its own feedback controller) to minimize engine structural damage caused by a combination of thermal and structural loads. This enables increased on-wing time for the engine through better management of the engine-component life usage. Thus, the engine-level DES acts as a life-extending controller through its interaction with and manipulation of the engine s operation.

Litt, Jonathan S.↗
NASA NTRS1989

The structure of the clouds distributed operating system

A novel system architecture, based on the object model, is the central structuring concept used in the Clouds distributed operating system. This architecture makes Clouds attractive over a wide class of machines and environments. Clouds is a native operating system, designed and implemented at Georgia Tech. and runs on a set of generated purpose computers connected via a local area network. The system architecture of Clouds is composed of a system-wide global set of persistent (long-lived) virtual address spaces, called objects that contain persistent data and code. The object concept is implemented at the operating system level, thus presenting a single level storage view to the user. Lightweight treads carry computational activity through the code stored in the objects. The persistent objects and threads gives rise to a programming environment composed of shared permanent memory, dispensing with the need for hardware-derived concepts such as the file systems and message systems. Though the hardware may be distributed and may have disks and networks, the Clouds provides the applications with a logically centralized system, based on a shared, structured, single level store. The current design of Clouds uses a minimalist philosophy with respect to both the kernel and the operating system. That is, the kernel and the operating system support a bare minimum of functionality. Clouds also adheres to the concept of separation of policy and mechanism. Most low-level operating system services are implemented above the kernel and most high level services are implemented at the user level. From the measured performance of using the kernel mechanisms, we are able to demonstrate that efficient implementations are feasible for the object model on commercially available hardware. Clouds provides a rich environment for conducting research in distributed systems. Some of the topics addressed in this paper include distributed programming environments, consistency of persistent data and fault-tolerance.

Dasgupta, Partha↗
NASA NTRS2004

Polymorphic Electronic Circuits

Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

Stoica, Adrian↗
NASA NTRS1992

Matrix-vector multiplication using digital partitioning for more accurate optical computing

Digital partitioning offers a flexible means of increasing the accuracy of an optical matrix-vector processor. This algorithm can be implemented with the same architecture required for a purely analog processor, which gives optical matrix-vector processors the ability to perform high-accuracy calculations at speeds comparable with or greater than electronic computers as well as the ability to perform analog operations at a much greater speed. Digital partitioning is compared with digital multiplication by analog convolution, residue number systems, and redundant number representation in terms of the size and the speed required for an equivalent throughput as well as in terms of the hardware requirements. Digital partitioning and digital multiplication by analog convolution are found to be the most efficient alogrithms if coding time and hardware are considered, and the architecture for digital partitioning permits the use of analog computations to provide the greatest throughput for a single processor.

Gary, C. K.↗
NASA NTRS2001

Marshall Space Flight Center's Tower Vector Magnetograph: Upgrades, Hardware, and Operations for the HESSI Mission

The Marshall Space Flight Center's (MSFC) solar group announces the successful upgrade of our tower vector magnetograph. In operation since 1973, the last major alterations to the system (which includes telescope, filter, polarizing optics, camera, and data acquisition computer) were made in 1982, when we upgraded from an SEC Vidicon camera to a CCD. In 1985, other changes were made which increased the field-of-view from 5 x 5 arc min (2.4 arc sec per pixel) to 6 x 6 arc min with a resolution of 2.81 arc sec. In 1989, the Apollo Telescope Mount H-alpha telescope was coaligned with the optics of the magnetograph. The most recent upgrades (year 2000), funded to support the High Energy Solar Spectroscopic Imager (HESSI) mission, have resulted in a pixel size of 0.64 arc sec over a 7 x 5.2 arc min field-of-view (binning 1x1). This poster describes the physical characteristics of the new system and compares spatial resolution, timing, and versatility with the old system. Finally, we provide a description of our Internet web site, which includes images of our most recent observations, and links to our data archives, as well as the history of magnetography at MSFC and education outreach pages.

Adams, M. L.↗