Search NASA⌕ Search

SEARCH · Search NASA

Results for “MEMORY DEVICES”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 307 records · Page 17

Spatiotemporal Thermal Coupling in VO 2 Device Arrays

Correlated oxides such as VO 2 exhibit an electrically driven insulator–metal transition (IMT) that underlies their promise for neuromorphic and memory devices. Yet the IMT is not a uniform bulk process but a spatiotemporal phenomenon in which local heating nucleates filaments, contracts or dissolves them with the electric field, and couples to the environment. In this work, we directly image the VO 2 IMT dynamics by mid-wave infrared, thermography synchronized with electrical transport, resolving device temperature with micrometer spatial and microsecond temporal resolution. At the single-device level, we capture the full cycle of filament nucleation, contraction, and relaxation during current/voltage-driven resistive switching. At the array level, we show that heat propagates across etched gaps with an effective length scale of ∼131 µm, enabling cooperative behaviors among electrically isolated devices. Short-range distanced devices exhibit mutual filament attraction and sequential dissolution, while long-range distanced devices differentiate into distinct roles: drivers that initiate switching, cooperative responders that undergo assisted self-oscillations, and passive reporters that record the thermal field. Furthermore, these results reframe thermal crosstalk, long regarded as parasitic, as an intrinsic coupling channel and design principle for organizing collective switching behaviors, with direct implications for emergent circuit functionality in neuromorphic and unconventional computing architectures.

coupling↗

Flash memory reliability NEPP 2008 task final report

This is the preliminary report which is based on the flash memory reliability studies conducted during the first year (2008) of the multi-year NEPP task. The report outlines the technology and reliability challenges for advanced flash memory technologies, summarizes the test results and analyses of reliability characterizations performed on the selected flash memory devices during 2008, and provides the preliminary thoughts on the risk mitigation approaches on using advanced flash memory technologies for space applications.

Chen, Yuan↗

Hod Carrier

SAND2023-06720O Hod Carrier is a simple proof-of-concept library for moving data from host to NVIDIA BlueField device memory using remote direct memory access. The Hod Carrier software also facilitates research activities related to the potential uses of NVIDIA BlueField data processing unit devices. Using well-established technologies (e.g., RDMA over Infiniband), it will move data from the host to the data processing unit’s memory. This software is a middleware utility for moving data without regard to its semantic meaning. Its operation is fundamentally unaffected by storage allocation. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.

SciDAC↗

Si Doped Hafnium Oxide-A “Fragile” Ferroelectric System

Here, silicon doped hafnium oxide was the material used in the original report of ferroelectricity in hafnia in 2011. Since then, it has been subject of many further publications including the demonstration of the world's first ferroelectric field-effect transistor in the state-of-the-art 28 nm technology. Though many studies are conducted with a strong focus on application in memory devices, a comprehensive study on structural stability in these films remains to be seen. In this work, a film thickness of about 36 nm, instead of the 10 nm used in most previous studies, is utilized to carefully probe how the concentration range impacts the evolution of phases, the dopant distribution, the field cycling effects, and their interplay in the macroscopic ferroelectric response of the films. Si:HfO2 appears to be a rather fragile system: different phases seem close in energy and the system is thus rich in competing phenomena. Nonetheless, it offers ferroelectricity or field-induced ferroelectricity for elevated annealing conditions up to 1000 °C. Similar to the measures taken for conventional ferroelectrics such as lead zirconate titanate, engineering efforts to guarantee stable interfaces and stoichiometry are mandatory to achieve stable performance in applications such as ferroelectric memories, supercapacitors, or energy harvesting devices.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Algorithmic optimization of quantum optical storage in solids

Quantum memory devices with high storage efficiency and bandwidth are essential elements for future quantum networks. Solid-state quantum memories can provide broadband storage, but they primarily suffer from low storage efficiency. We use passive optimization and algorithmic optimization techniques to demonstrate nearly a sixfold enhancement in quantum memory efficiency. In this regime, we demonstrate coherent and single-photon-level storage with a high signal-to-noise ratio. The optimization technique presented here can be applied to most solid-state quantum memories to significantly improve the storage efficiency without compromising the memory bandwidth. Published by the American Physical Society 2024

Lei, Yisheng↗

NAS technical summaries: Numerical aerodynamic simulation program, March 1991 - February 1992

NASA created the Numerical Aerodynamic Simulation (NAS) Program in 1987 to focus resources on solving critical problems in aeroscience and related disciplines by utilizing the power of the most advanced supercomputers available. The NAS Program provides scientists with the necessary computing power to solve today's most demanding computational fluid dynamics problems and serves as a pathfinder in integrating leading-edge supercomputing technologies, thus benefiting other supercomputer centers in Government and industry. This report contains selected scientific results from the 1991-92 NAS Operational Year, March 4, 1991 to March 3, 1992, which is the fifth year of operation. During this year, the scientific community was given access to a Cray-2 and a Cray Y-MP. The Cray-2, the first generation supercomputer, has four processors, 256 megawords of central memory, and a total sustained speed of 250 million floating point operations per second. The Cray Y-MP, the second generation supercomputer, has eight processors and a total sustained speed of one billion floating point operations per second. Additional memory was installed this year, doubling capacity from 128 to 256 megawords of solid-state storage-device memory. Because of its higher performance, the Cray Y-MP delivered approximately 77 percent of the total number of supercomputer hours used during this year.

Source record↗

The contribution of diffusion to device upset cross sections

A novel technique incorporating carrier recombination, for determining the charge collection efficiency funcition is presented and applied to a realistic, 3-D, memory device to obtain the upset cross section as a function of LET and orientation of incidence.

charge collection diffusion SEU↗

Probabilistic Nanomagnetic Memories for Uncertain and Robust Machine Learning

This project evaluated the use of emerging spintronic memory devices for robust and efficient variational inference schemes. Variational inference (VI) schemes, which constrain the distribution for each weight to be a Gaussian distribution with a mean and standard deviation, are a tractable method for calculating posterior distributions of weights in a Bayesian neural network such that this neural network can also be trained using the powerful backpropagation algorithm. Our project focuses on domain-wall magnetic tunnel junctions (DW-MTJs), a powerful multi-functional spintronic synapse design that can achieve low power switching while also opening the pathway towards repeatable, analog operation using fabricated notches. Our initial efforts to employ DW-MTJs as an all-in-one stochastic synapse with both a mean and standard deviation didn’t end up meeting the quality metrics for hardware-friendly VI. In the future, new device stacks and methods for expressive anisotropy modification may make this idea still possible. However, as a fall back that immediately satisfies our requirements, we invented and detailed how the combination of a DW-MTJ synapse encoding the mean and a probabilistic Bayes-MTJ device, programmed via a ferroelectric or ionically modifiable layer, can robustly and expressively implement VI. This design includes a physics-informed small circuit model, that was scaled up to perform and demonstrate rigorous uncertainty quantification applications, up to and including small convolutional networks on a grayscale image classification task, and larger (Residual) networks implementing multi-channel image classification. Lastly, as these results and ideas all depend upon the idea of an inference application where weights (spintronic memory states) remain non-volatile, the retention of these synapses for the notched case was further interrogated. These investigations revealed and emphasized the importance of both notch geometry and anisotropy modification in order to further enhance the endurance of written spintronic states. In the near future, these results will be mapped to effective predictions for room temperature and elevated operation DW-MTJ memory retention, and experimentally verified when devices become available.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Nanoprobe Based Information Processing: Nanoprobe‐Electronics

Abstract With computational architectures becoming data‐centric and with the rise of in‐memory computing, the role of memory will be ever more crucial. In turn, storing massive amount of data demands for ultra‐low power and non‐volatile types necessitating new memory technologies. Here, a controllable nanoelectromechanical (NEM) spin memory is proposed for compact nonvolatile memory arrays. It combines the advantages of both nanomechanical and spin‐transfer torque (STT) magnetic memory devices to overcome fundamental scalability roadblocks of non‐hybrid alternatives. The hybrid system paves the way to a new memory technology in the regime of sub‐10‐nm lateral size with a sub‐1‐MA cm −2 switching energy.

Yi, Bao↗

Low Power, Radiation Resilient Synchronous Edge Processing for Remote Monitoring

Next-generation space remote sensing systems may be equipped with imaging arrays that sense data at a rate that outstrips the processing capability of any computing hardware that can operate within a satellite’s power budget. This project developed novel convolutional and recurrent neural networks to detect and estimate point-like events amid clutter, and investigated their efficient and accurate implementation on analog in-memory computing systems that are 10-1000× more energy-efficient than digital processors. This project leveraged two memory devices at different levels of technological maturity: a large-scale analog computing prototype using commercial SONOS charge-trap memory, and electrochemical memory (ECRAM) with intrinsic radiation hardness. We experimentally demonstrated end-to-end analog processing of our neural networks on SONOS and characterized the radiation response of both SONOS and ECRAM. We advanced the state-of-the-art in ECRAM precision and reliability, and developed co-design methods to enable accurate long-term operation of SONOS analog accelerators in space radiation environments.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Fault-tolerant computer system

More reliable computers could be assembled by connecting four proposed VSLI "building block" circuits with built-in error detection to standard microprocessors and memory devices to form self checking computer module. Each building block detects its own malfunctions and single bit errors found in memory.

Avizienis, A. A.↗

Local rollback for fault-tolerance in parallel computing systems

A control logic device performs a local rollback in a parallel super computing system. The super computing system includes at least one cache memory device. The control logic device determines a local rollback interval. The control logic device runs at least one instruction in the local rollback interval. The control logic device evaluates whether an unrecoverable condition occurs while running the at least one instruction during the local rollback interval. The control logic device checks whether an error occurs during the local rollback. The control logic device restarts the local rollback interval if the error occurs and the unrecoverable condition does not occur during the local rollback interval.

97 MATHEMATICS AND COMPUTING↗

Standardizing Microprocessor and GPU Radiation Test Approaches

Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising next-generation technologies that enables both high performance processing and acceleration of complex algorithms for the latest challenges in human spaceflight, autonomous vehicles and artificial intelligence (AI). The feature sets of these devices offer exponential increases to throughput, calculation capability and system autonomy when compared to legacy flight systems. NASA's Electronic Part and Packaging (NEPP) Program has conducted an investigation into the radiation susceptibility of leading edge devices and process technologies by establishing standardized test approaches. Unlike most discrete devices, these require state of the art test systems to induce specific hardware activity similar to application software, thus allowing the characterization of failure modes within the system. To best characterize the tested part, NEPP eliminates variables that may impact device performance under radiation. Simplification of remaining system-level variables leads to an improved understanding of complex computational devices and their intended applications. The failure modes and error signatures that are recorded during testing are used to determine radiation sensitivity of the semiconductor process and the microcode architecture of the design. This presentation will discuss the test methodology that NASA Electronic Parts and Packaging (NEPP) is working to establish for its microprocessor, GPU and DDRx memory test programs to provide guidance on these devices and their underlying technology, in regards to their potential usage in future space flight systems.

GPU↗

PERKS: a Locality-Optimized Execution Model for Iterative Memory-bound GPU Applications

Iterative memory-bound solvers commonly occur in HPC codes. Typical GPU implementations have a loop on the host side that invokes the GPU kernel as much as time/algorithm steps there are. The termination of each kernel implicitly acts the barrier required after advancing the solution every time step. We propose an execution model for running memory-bound iterative GPU kernels: PERsistent KernelS (PERKS). In this model, the time loop is moved inside persistent kernel, and device-wide barriers are used for synchronization. We then reduce the traffic to device memory by caching subset of the output in each time step in the unused registers and shared memory. PERKS can be generalized to any iterative solver: they largely independent of the solver's implementation. We explain the design principle of PERKS and demonstrate effectiveness of PERKS for a wide range of iterative 2D/3D stencil benchmarks (geomean speedup of 2.12x for 2D stencils and 1.24x for 3D stencils over state-of-art libraries), and a Krylov subspace conjugate gradient solver (geomean speedup of 4.86x in smaller SpMV datasets from SuiteSparse and 1.43x in larger SpMV datasets over a state-of-art library). All PERKS-based implementations available at: https://github.com/neozhang307/PERKS.

Zhang, Lingqi↗

Cathodochromic storage device

A memory and display device has been developed by combing a fast phosphor layer with a cathodochromic layer in a cathode ray tube. Images are stored as patterns of electron beam induced optical density in the cathodo-chromic material. The stored information is recovered by exciting the backing, fast phosphor layer with a constant current electron beam and detecting the emitted radiation which is modulated by absorption in the cathodochromic layer. The storage can be accomplished in one or more TV frames (1/30 sec each). More than 500 TV line resolution and close to 2:1 contrast ratio are possible. The information storage time in a dark environment is approximately 24 hours. A reconstituted (readout) electronic video signal can be generated continuously for times in excess of 10 minutes or periodically for several hours.

Bosomworth, D. R.↗

Magnetoresistance and noise properties of chevron stretcher detectors for field access bubble domain devices

Experiments were devised to study the angular variation of the resistance and noise properties of one- and two-level chevron stretcher magnetoresistive detectors for use in field access bubble memory devices. All measurements, made with an electronic system, were performed on glass or garnet samples upon which 1 micron of SiO2 was sputter-deposited, followed by 4000 A of Permalloy for the 28-micron-period devices and 0.8 microns of SiO2, followed by 3000 A of Permalloy for the 20-micron-period devices. The geometrical and drive-state dependence of the zero-state noise were studied, as was its frequency dependence. It is found that both types of detectors operate primarily in the amplitude-shift mode for drive fields of interest and that the presence of a bubble in a detector causes a magnetoresistance change equal to that produced by increasing the in-plane drive field about 8 Oe in the absence of a bubble.

George, P. K.↗

Energy and Area Efficiency in Neuromorphic Computing for Resource Constrained Devices

Resource constrained devices are the building blocks of the internet of things (IoT) era. Since the idea behind IoT is to develop an interconnected environment where the devices are tiny enough to operate with limited resources, several control systems have been built to maintain low energy and area consumption while operating as IoT edge devices. Several researchers have begun work on implementing control systems built from resource constrained devices using machine learning. However, there are many ways such devices can achieve lower power consumption and area utilization while maximizing application efficiency. Spiky neuromorphic computing (SNC) is an emerging paradigm that can be leveraged in resource constrained devices for several emerging applications. While delivering the benefits of machine learning, SNC also helps minimize power consumption. For example, low energy memory devices (memristors) are often used to achieve low power operation and also help in reducing system area. In total, we anticipate SNC will provide computational efficiency approaching that of deep learning while using low power, resource constrained devices.

Chakma, Gangotree↗

End-group-directed self-assembly of organic compounds useful for photovoltaic applications

The present invention provides for an organic compound comprising electron deficient unit covalently linked to two or more electron rich units. The present invention also provides for a device comprising the organic compound, such as a light-emitting diode, thin-film transistor, chemical biosensor, non-emissive electrochromic, memory device, photovoltaic cells, or the like.

14 SOLAR ENERGY↗