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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17

Upgrading Metallurgical-Grade Silicon

Closed-loop process produces semiconductor-grade silicon. Metallurgical-grade silicon converted to ultrapure silicon by reacting with hydrogen and silicon tetrahalide to form trihalosilane, purifying this intermediate and again decomposing to high purity silicon in third stage. Heterogeneously and homogeneously nucleated polycrystalline silicon used in semiconductor device applications and in silicon photovoltaic solar cell fabrication.

Woerner, L. M.↗

Hot-Dipped Metal Films as Epitaxial Substrates

Multistep process forms semiconductor devices on macrocrystalline films of cadmium or zinc. Solar-cell fabrication processes use hot-dipped macrocrystalline films on low-cost sheet-metal base as substrates for epitaxy. Epitaxial layers formed by variety of methods of alternative sequence paths. Solar cells made economically by forming desired surface substance directly on metal film by chemical reactions.

Shlichta, P. J.↗

Making Cubic Silicon Carbide Semiconductors

Thin buffer layer of SiC minimizes effects of lattice mismatch. Approach consists of growing single-crystal layer of cubic SiC on single-crystal silicon (Si) wafer by chemical-vapor deposition (CVD). Process developed for production of large-area single-crystal wafers of cubic silicon carbide (SiC) for semiconductor devices; also used to make devices themselves. Applications include electronics for high temperature (up to 900 C) and electronics for very high frequencies.

Powell, J.↗

Diffusion barriers

The choice of the metallic film for the contact to a semiconductor device is discussed. One way to try to stabilize a contact is by interposing a thin film of a material that has low diffusivity for the atoms in question. This thin film application is known as a diffusion barrier. Three types of barriers can be distinguished. The stuffed barrier derives its low atomic diffusivity to impurities that concentrate along the extended defects of a polycrystalline layer. Sacrificial barriers exploit the fact that some (elemental) thin films react in a laterally uniform and reproducible fashion. Sacrificial barriers have the advantage that the point of their failure is predictable. Passive barriers are those most closely approximating an ideal barrier. The most-studied case is that of sputtered TiN films. Stuffed barriers may be viewed as passive barriers whose low diffusivity material extends along the defects of the polycrystalline host.

Nicolet, M. A.↗

The physics of a single-event upset in integrated circuits: A review and critique of analytical models for charge collection

When an energetic particle (kinetic energy 0.5 MeV) originating from a radioactive decay or a cosmic ray transverse the active regions of semiconductor devices used in integrated circuit (IC) chips, it leaves along its track a high density electron hole plasma. The subsequent decay of this plasma by drift and diffusion leads to charge collection at the electrodes large enough in most cases to engender a false reading, hence the name single-event upset (SEU). The problem of SEU's is particularly severe within the harsh environment of Jupiter's radiation belts and constitutes therefore a matter of concern for the Galileo mission. The physics of an SEU event is analyzed in some detail. Owing to the predominance of nonlinear space charge effects and the fact that positive (holes) and negative (electrons) charges must be treated on an equal footing, analytical models for the ionized-charge collection and their corresponding currents as a function of time prove to be inadequate even in the simplest case of uniformly doped, abrupt p-n junctions in a one-dimensional geometry. The necessity for full-fledged computer simulation of the pertinent equations governing the electron-hole plasma therefore becomes imperative.

Vonroos, O.↗

Single-Event-Upset Studies: A Compilation

Document summarizes 15 studies of single-event upsets covering 60 different types of semiconductor devices. Studies discussed in document include verification of basic reactions induced by heavy ions and protons and surveys of latchup and bit-flip susceptibility of several types of devices and device-fabrication technologies.

Nichols, D. K.↗

Constant-Pressure Sawing

Attachment for reciprocating power-saw maintains nearly constant cutting pressure even though kerf length varies. Attachment developed for wire saws used to slice cylindrical silicon ingots into wafers for semiconductor devices. By maintaining constant pressure, attachment helps to ensure smooth, flat, uniform wafers. Principle adaptable to straight, toothed saws as well as to wire saws.

Orris, G. M.↗

Field funneling and range straggling in partially depleted silicon surface-barrier detectors

The effects of field funneling and range straggling have been quantitatively observed in the measurement of charge collected from alpha-particle tracks in silicon surface-barrier charged-particle detectors. The method described may be used for the straight-forward measurement of charge collection from heavy ions in these and other semiconductor devices.

Zoutendyk, J. A.↗

Applicability of the Meyer-Neldel rule to solar cells

A comparison of data taken on high quality silicon, GaAs, and GaInAs solar cells with those taken on a variety of homojunction, heterojunction, and metal-insulator-semiconductor devices indicates that while the Meyer-Neldel rule may be applicable to certain types of solar cells it is not applicable to well-behaved, diffusion-controlled homojunction devices. It cannot be used, therefore, as a universal rule to predict maximum achievable solar cell voltages.

Goradia, C.↗

Field Funneling and Range Straggling in Silicon Detectors

Magnitudes of field funneling and range straggling determined in silicon-surface-barrier (Schottky-barrier) charged-particle detectors (SSBD's) through meaurement of charges collected from alpha-particle tracks. Method used extended to straightforward measurement of charge collection from heavy-ion tracks in these and other semiconductor devices. Such measurements used to assess single-event upsets in integratedcircuit chips, with view toward making them resistant to radiation. Field funneling and range straggling measured with electronic system in which charge collected from individual ions measured and recorded by multichannel analyzer.

Zoutendyk, J. A.↗

Direct experimental determination of voltage across high-low junctions

High-low (HL) junctions form a part of many semiconductor devices, including back surface field solar cells. A first experimental determination and interpretation of the voltage across the HL junction under low- and high-injection conditions is presented as a function of the voltage across a nearby p/n junction. Theoretical analysis from first principles is shown to bear well on the experimental results. In addition, a test structure is proposed for measurement of the effective surface recombination velocity at the HL junctions.

Daud, T.↗

Status of utility-interactive photovoltaic power conditioning technology

Design options for utility-interactive photovoltaic power conditioning technology for unit ratings from 2kW to 5 MW are compared. Line- and self-commutated inverter designs for both single and three-phase applications are described. Efficiency, weight, and cost projections are provided for comparing the design options. New circuit designs that take advantage of advances in power semiconductor devices are found to be the most promising. Hardware efficiencies from 95 percent for single phase to 98 percent for three-phase applications are found.

Key, T. S.↗

Exact solution of three-dimensional transport problems using one-dimensional models

Several parameters of certain three-dimensional semiconductor devices including diodes, transistors, and solar cells can be determined without solving the actual boundary-value problem. The recombination current, transit time, and open-circuit voltage of planar diodes are emphasized here. The resulting analytical expressions enable determination of the surface recombination velocity of shallow planar diodes. The method involves introducing corresponding one-dimensional models having the same values of these parameters.

Misiakos, K.↗

Recycling Silane

Costly gas purified after use in deposition reactor. Proposed method for recycling silane reduces cost of producing pure silicon for semiconductor devices.

Lutwack, Ralph↗

Fluidized-Bed Cleaning of Silicon Particles

Fluidized-bed chemical cleaning process developed to remove metallic impurities from small silicon particles. Particles (250 micrometer in size) utilized as seed material in silane pyrolysis process for production of 1-mm-size silicon. Product silicon (1 mm in size) used as raw material for fabrication of solar cells and other semiconductor devices. Principal cleaning step is wash in mixture of hydrochloric and nitric acids, leaching out metals and carrying them away as soluble chlorides. Particles fluidized by cleaning solution to assure good mixing and uniform wetting.

Rohatgi, Naresh K.↗

Computer control of a scanning electron microscope for digital image processing of thermal-wave images

Using a recently developed technology called thermal-wave microscopy, NASA Lewis Research Center has developed a computer controlled submicron thermal-wave microscope for the purpose of investigating III-V compound semiconductor devices and materials. This paper describes the system's design and configuration and discusses the hardware and software capabilities. Knowledge of the Concurrent 3200 series computers is needed for a complete understanding of the material presented. However, concepts and procedures are of general interest.

Gilbert, Percy↗

Automatic Replenishment Of Dopant In Silicon Growth

Dopant incorporated feed pellets to maintain required concentration. Technique of continuous replenishment of dopant in silicon melt helps ensure correct resistivity in solid silicon grown from melt. Technique used in dendritic-web growth process in which ribbon of silicon continously pulled from molten material. Providing uniform doping and resistivity in ribbon technique enables production of high-quality silicon ribbon at high yields for use in semiconductor devices.

Kochka, E. L.↗