The influence of heavy doping on the emitter efficiency of a bipolar transistor
Bipolar junction transistor doping effects on bandgap decrease and emitter efficiency, explaining current gain temperature dependence
De Man, H. J. J.↗
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Coaxial Inverted Geometry Epitaxial Transistor
Silicon transistor, developed for use in biotelemetry circuits, provides high current gain at low levels of power and voltage. Device operates from biopotential or miniature batteries and is suitable for incorporation into monolithic integrated circuits. Coaxial configuration and small size offer promise for high frequency application.
Hruby, R. J.↗
Gate protective device for insulated gate field-effect transistors
Device, which protects insulated gate field-effect transistors, improves reliability through utilization of layers of conductive material on top of each alternating semiconductor material region. Separation of layers is necessary to prevent shorting out junctions between alternating regions.
Sunshine, R. A.↗
Insulated-gate field-effect transistor strain sensor
Strain sensors that can be switched on and off were fabricated from p-channel IGFET on thin filament n-type silicon crystals with silicon dioxide layer sputtered over transistor for passivation. Applications include integration with microelectronic circuits for multiplexing.
Gross, C.↗
Research on variable threshold transistor storage systems
A fully integrated, electrically alterable, nonvolatile, nondestructive readout control memory was developed, using as storage elements metal-nitride-silicon variable threshold transistors. An optimum approach to such a memory was developed in which a three dimensional selection technique was used, both for read and write operations. Electrical isolation of writing and memory circuits was obtained by means of separate memory and write circuit chips. This method provided protection from voltage breakdowns, increased circuit flexibility, and greater ease of testing of interim and final circuit elements.
Wegener, H. A. R.↗
Current conduction in junction gate field effect transistors
The internal physical mechanism that governs the current conduction in junction-gate field effect transistors is studied. A numerical method of analyzing the devices with different length-to-width ratios and doping profiles is developed. This method takes into account the two dimensional character of the electric field and the field dependent mobility. Application of the method to various device models shows that the channel width and the carrier concentration in the conductive channel decrease with increasing drain-to-source voltage for conventional devices. It also shows larger differential drain conductances for shorter devices when the drift velocity is not saturated. The interaction of the source and the drain gives the carrier accumulation in the channel which leads to the space-charge-limited current flow. The important parameters for the space-charge-limited current flow are found to be the L/L sub DE ratio and the crossover voltage.
Kim, C.↗
GaAs vapor-grown bipolar transistors.
Discussion of an approach for the fabrication of high-temperature GaAs transistors which is centered on the preparation of n-p-n three-layered structures entirely by a vapor-phase growth technique, as described by Tietjen and Amick (1966). The low growth temperature of approximately 750 C is thought to reduce contamination during crystal growth and to contribute to the reasonably high minority-carrier lifetimes obtained for the vapor-grown p-n junctions. The fact that impurity concentrations and layer thicknesses can be precisely controlled for epitaxial layers as thin as 1 micrometer is an important feature of this growth technique.
Nuese, C. J.↗
On the wide-range bias dependence of transistor d.c. and small-signal current gain factors.
Critical reappraisal of the bias dependence of the dc and small-signal ac current gain factors of planar bipolar transistors over a wide range of currents. This is based on a straightforward consideration of the three basic components of the dc base current arising due to emitter-to-base injected minority carrier transport, base-to-emitter carrier injection, and emitter-base surface depletion layer recombination effects. Experimental results on representative n-p-n and p-n-p silicon devices are given which support most of the analytical findings.
Schmidt, P.↗
GaAs transistors formed by Be or Mg ion implantation
N-p-n transistor structures have been formed in GaAs by implanting n-type substrates with Be ions to form base regions and then implanting them with 20-keV Si ions to form emitters. P-type layers have been produced in GaAs by implantation of either Mg or Be ions, with substrate at room temperature, followed by annealing at higher temperatures.
Hunsperger, R. G.↗
Computer-aided design of high-frequency transistor amplifiers.
A systematic step-by-step computer-aided procedure for designing high-frequency transistor amplifiers is described. The technique makes it possible to determine the optimum source impedance which gives a minimum noise figure.
Hsieh, C.-C.↗
The light-sensitive MNOS memory transistor.
The behavior theory of the light-sensitive MNOS memory transistor is developed and supported by presented experimental evidence. It is shown that the nitride, oxide, and silicon space-charge current-field relationships necessary for comparison of theory and experiment can be obtained from steady-state current-voltage measurements on the MNOS device.
Sewell, F. A., Jr.↗
Transistorized blocking generator
Test results are given for a high speed transistorized blocking generator.
Popkov, A. V.↗
Relationships among classes of self-oscillating transistor parallel inverters
A procedure is developed for classifying dc-to-square-wave two-transistor parallel inverters used in power conditioning applications. The inverters are reduced to equivalent RLC networks and are then grouped with other inverters with the same basic equivalent circuit. Distinction between inverter classes is based on the topology characteristics of the equivalent circuits. Information about one class can then be extended to another class using the basic oscillation theory and the concept of duality. Oscillograms from test circuits confirm the validity of the procedure adopted.
Wilson, T. G.↗
Power transistor performance tradeoffs
Recent advances in the understanding of bipolar device physics permit the derivation of a number of quantitative relationships which are useful for improving existing designs and also for assessing the feasibility of proposed devices. This paper describes three important tradeoffs which apply to the design and performance of high-voltage transistors in inverter circuits.
Hower, P. L.↗
Transistor-to-substrate bond quality
Quantitative measurement of X-ray images of bonded power-transistor chips is accomplished by using light meter, which determines percentage of voids in bond.
Telfer, T. A.↗
A Field-Effect Transistor (FET) model for ASAP
The derivation of the circuitry of a field effect transistor (FET) model, the procedure for adapting the model to automated statistical analysis program (ASAP), and the results of applying ASAP on this model are described.
Ming, L.↗
Semicustom integrated circuits and the standard transistor array radix (STAR)
The development, application, pros and cons of the semicustom and custom approach to the integration of circuits are described. Improvements in terms of cost, reliability, secrecy, power, and size reduction are examined. Also presented is the standard transistor array radix, a semicustom approach to digital integrated circuits that offers the advantages of both custom and semicustom approaches to integration.
Edge, T. M.↗
The charge-flow transistor - A new MOS device
A new device, the charge-flow transistor (CFT), has been developed to achieve integrated MOS compatibility in sensor applications, such as gas, humidity, and fire detection, where one is interested in monitoring the transverse resistance of a thin film. The resistive material is incorporated into the gate structure of the CFT in such a way that there is a time delay between the application of the gate-to-source voltage and the appearance of a complete channel. This time delay depends on the resistivity of the thin film. A theory of device operation is presented, together with experimental results on the first CFT's. These results confirm the principles of operation, and demonstrate the utility of the CFT for making fully integrated sensing devices.
Senturia, S. D.↗