Search NASA⌕ Search

SEARCH · Search NASA

Results for “CIRCUIT RELIABILITY”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 325 records · Page 18

Configuration study for a 30 GHz monolithic receive array: Technical assessment

The current status of monolithic microwave integrated circuits (MMICs) in phased array feeds is discussed from the point of view of cost performance, reliability, and design considerations. Transitions to MMICs, compatible antenna radiating elements and reliability considerations are addressed. Hybrid antennas, feed array antenna technology, and offset reflectors versus phased arrays are examined.

Nester, W. H.↗

Four-terminal electrical testing device

The invention relates to a four-terminal electrical connector device for testing and measuring unknown resistances of initiators used for starting pyrotechnic events aboard the space shuttle. The testing device minimizes contact resistance degradation effects and so improves the reliability of resistance measurements taken with the device. Separate and independent voltage sensing and current supply circuits each include a pair of socket contacts for mating engagement with the pins of the initiator. The unknown resistance that is measured by the device is the resistance of the bridgewire of the initiator which is required to be between 0.95 and 1.15 ohms.

Robinson, Robert L.↗

Lower-Thermal-Conductivity Tapes For Tape Automated Bonding

Foils of manganin substituted for copper foils ordinarily serving as electrical conductors on tapes used in tape automated bonding (TAB) in electronic circuits. Modification makes possible to apply TAB technology to circuits in which substantial gradients of temperature exist under design operating conditions. Other advantages include high reliability, automated assembly, and automated testing.

Young, Erick T.↗

T-shaped emitter metal heterojunction bipolar transistors for submillimeter wave applications

We report on the development of submillimeter wave transistors at JPL. The goal of the effort is to produce advance-reliable high frequency and high power amplifiers, voltage controlled oscillators, active multipliers, and high-speed mixed-signal circuits for space borne applications. The technology in development to achieve this is based on the Indium Phosphide (InP) Heterojunction Bipolar Transistor (HBT). The HBT is well suited for high speed, high power and uniform (across wafer) performance, due to the ability to tailor the material structure that electrons traverse through by well-controlled epitaxial growth methods. InP with its compatible lattice matched alloys such as indium gallium arsenide (InGaAs) and indium aluminium arsenide (InAlAs) provides for high electron velocities and high voltage breakdown capabilities. The epitaxial methods for this material system are fairly mature, however the implementation of high performance and reliable transistors are still under development by many laboratories. Our most recently fabricated, second generation mesa HBTs at JPL have extrapolated current gain cutoff frequency (FJ of 142GHz and power gain cutoff frequency (Fm,) of approximately 160GHz. This represents a 13% and 33% improvement of Ft and F, respectively, compared to the first generation mesa HBTs [l]. Analysis based on the University of California, Santa Barbara (UCSB) device model, RF device characteristics can be significantly improved by reducing base contact resistance and base metal contact width. We will describe our effort towards increasing transistor performance and yield.

transistor↗

Analysis of a Dynamic Flexed Flat Cable Harness

A dynamic flex test was performed on a spacecraft instrument harness composed of multiple individual flex cables, with each flex cable containing multiple copper traces. The purpose of the test was to demonstrate the capability of the harness to survive the number of expected flex cycles during the planned mission with appropriate margin. However, during testing, increased trace resistances and open circuits were observed beginning at approximately 10% of the total number of planned flex cycles. This paper discusses the various proximate causes that contributed to increased and open resistance in the flex cables and the subsequent redesign, manufacturing, reliability, and quality-related changes that were instituted. An analysis process, including failure analysis, non-destructive evaluation, digital imaging correlation, and parametric modeling, will also be discussed. The paper will cover the development of a robust dynamic flex harness design and include recommendations to extend flex harness life; make changes to the flex harness life test; and improve flex cable manufacturing, quality, and reliability.

Flexible PCB↗

Analysis of a Dynamic Flexed Flat Cable Harness

A dynamic flex test was performed on a spacecraft instrument harness composed of multiple individual flex cables, with each flex cable containing multiple copper traces. The purpose of the test was to demonstrate the capability of the harness to survive the number of expected flex cycles during the planned mission with appropriate margin. However, during testing, increased trace resistances and open circuits were observed beginning at approximately 10% of the total number of planned flex cycles. This paper discusses the various proximate causes that contributed to increased and open resistance in the flex cables and the subsequent redesign, manufacturing, reliability, and quality-related changes that were instituted. An analysis process, including failure analysis, non-destructive evaluation, digital imaging correlation, and parametric modeling, will also be discussed. The paper will cover the development of a robust dynamic flex harness design and include recommendations to extend flex harness life; make changes to the flex harness life test; and improve flex cable manufacturing, quality, and reliability.

Flexible PCB↗

Advances in gallium arsenide monolithic microwave integrated-circuit technology for space communications systems

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. In this paper, current developments in GaAs MMIC technology are described, and the status and prospects of the technology are assessed.

Bhasin, K. B.↗

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Connolly, Denis J.↗

Technical Challenges in Reliable Microelectronics Packaging of Microelectromechanical Systems (MEMS) for Space Applications

MEMS have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, chemical sensors, artificial nose, etc. Standard semiconductor microelectronics packaging needs the integrated circuits (IC) to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the reliable IC packaging technology. Active elements or microstructures in MEMS devices often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it measures to assure the packaging technology of MEMS. MEMS technology has a major application in developing a microspacecraft for space systems provided reliability of MEMS packaging technology is sufficiently addressed. This MEMS technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively. This paper discusses the latest developments in the MEMS technology and challenging technical issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices for microspacecraft applications.

Ramesham, Rajeshuni↗

Design and development of a fast scan infrared detection and measurement instrument

Infrared microscope instrument measures and plots the infrared profile of semiconductor chips, transistors and integrated circuits. Infrared analyses yields information on electrical and physical properties, enabling manufacturing improvements in semiconductor performance and reliability. Operational performance and main sections of the instrument are given.

Dostoomian, A. S.↗

Design and analysis of an automatic method of measuring silicon-controlled-rectifier holding current

The design of an automated SCR holding-current measurement system is described. The circuits used in the measurement system were designed to meet the major requirements of automatic data acquisition, reliability, and repeatability. Performance data are presented and compared with calibration data. The data verified the accuracy of the measurement system. Data taken over a 48-hr period showed that the measurement system operated satisfactorily and met all the design requirements.

Maslowski, E. A.↗

Reliability of Radioisotope Stirling Convertor Linear Alternator

Onboard radioisotope power systems being developed and planned for NASA s deep-space missions would require reliable design lifetimes of up to 14 years. Critical components and materials of Stirling convertors have been undergoing extensive testing and evaluation in support of a reliable performance for the specified life span. Of significant importance to the successful development of the Stirling convertor is the design of a lightweight and highly efficient linear alternator. Alternator performance could vary due to small deviations in the permanent magnet properties, operating temperature, and component geometries. Durability prediction and reliability of the alternator may be affected by these deviations from nominal design conditions. Therefore, it is important to evaluate the effect of these uncertainties in predicting the reliability of the linear alternator performance. This paper presents a study in which a reliability-based methodology is used to assess alternator performance. The response surface characterizing the induced open-circuit voltage performance is constructed using 3-D finite element magnetic analysis. Fast probability integration method is used to determine the probability of the desired performance and its sensitivity to the alternator design parameters.

Shah, Ashwin↗

Fiber-Coupled Planar Light-Wave Circuit for Seed Laser Control in High Spectral Resolution Lidar Systems

Precise laser remote sensing of aerosol extinction and backscatter in the atmosphere requires a high-power, pulsed, frequency doubled Nd:YAG laser that is wavelength- stabilized to a narrow absorption line such as found in iodine vapor. One method for precise wavelength control is to injection seed the Nd:YAG laser with a low-power CW laser that is stabilized by frequency converting a fraction of the beam to 532 nm, and to actively frequency-lock it to an iodine vapor absorption line. While the feasibility of this approach has been demonstrated using bulk optics in NASA Langley s Airborne High Spectral Resolution Lidar (HSRL) program, an ideal, lower cost solution is to develop an all-waveguide, frequency-locked seed laser in a compact, robust package that will withstand the temperature, shock, and vibration levels associated with airborne and space-based remote sensing platforms. A key technology leading to this miniaturization is the integration of an efficient waveguide frequency doubling element, and a low-voltage phase modulation element into a single, monolithic, planar light-wave circuit (PLC). The PLC concept advances NASA's future lidar systems due to its compact, efficient and reliable design, thus enabling use on small aircraft and satellites. The immediate application for this technology is targeted for NASA Langley's HSRL system for aerosol and cloud characterization. This Phase I effort proposes the development of a potassium titanyl phosphate (KTP) waveguide phase modulator for future integration into a PLC. For this innovation, the proposed device is the integration of a waveguide-based frequency doubler and phase modulator in a single, fiber pigtail device that will be capable of efficient second harmonic generation of 1,064-nm light and subsequent phase modulation of the 532 nm light at 250 MHz, providing a properly spectrally formatted beam for HSRL s seed laser locking system. Fabrication of the integrated PLC chip for NASA Langley, planned for the Phase II effort, will require full integration and optimization of the waveguide components (SHG waveguide, splitters, and phase modulator) onto a single, monolithic device. The PLC will greatly reduce the size and weight, improve electrical- to-optical efficiency, and significantly reduce the cost of NASA Langley s current stabilized HSRL seed laser system built around a commercial off-the-shelf seed laser that is free-space coupled to a bulk doubler and bulk phase modulator.

Cook, Anthony↗

Compact Spare-Row Decoder For Computer Memory

Spare-row memory-address-decoder circuit commanded to address ninth row in computer memory instead of addressing one of eight others it would address normally. Variants used to construct small, highly reliable computers. Spare-row decoder offers advantages of compactness, efficiency, and performance. Requires only 12.5 percent memory overhead. System equipped with spare-row decoder requires less glue logic and exhibits greater through-put. Applications include computers in Hitchhiker Central Unit embedded computer on Cassini spacecraft. Concept of circuit applicable to most flight computer systems.

Katz, Richard B.↗

Cryogenic Electronics Being Developed for Space Operation

Planetary exploration missions and deep space probes require electrical power management and control systems that can operate efficiently and reliably in very low temperature environments. Presently, spacecraft operating in the cold environment of deep space carry a large number of radioisotope heating units to maintain the surrounding temperature of the onboard electronics at approximately 20 C. Electronics capable of operation at cryogenic temperatures would not only tolerate the hostile environment of deep space but also reduce system size and weight by eliminating or reducing the radioisotope heating units and their associate structures. Thereby, such electronics would reduce system development as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results because semiconductor and dielectric materials have better behavior and tolerance in their electrical and thermal properties at low temperatures. The Low Temperature Electronics Program at the NASA Glenn Research Center is focusing on the research and development of electrical components, circuits, and systems suitable for applications in the aerospace environment and in deep space exploration missions. Research is being conducted on devices and systems for reliable use down to cryogenic temperatures. Some of the commercial off-the-shelf as well as developed components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. Semiconductor devices and integrated circuits including digital-to-analog and analog-to-digital converters, dc-dc converters, operational amplifiers, and oscillators are also being investigated for potential use in low-temperature applications. For example, the output response of an advanced oscillator at room temperature and at -190 C is shown. Most oscillators can operate at temperatures down to only -55 C. It can be seen that, for this oscillator, the low temperature of -196 C changed the leading and trailing edges of the oscillator pulses by producing overshoot. The research and development efforts performed under the Low Temperature Electronics Program at Glenn are being carried out through collaboration with other Government agencies, industrial and aerospace companies, and academia. The program supports missions as well as technology development efforts at NASA's Goddard Space Flight Center and Langley Research Center, and the Jet Propulsion Laboratory.

Patterson, Richard L.↗

2.5/3D Daisy Chain Reliability Evaluation

The objective of this task is to evaluate thermal cycle behavior of advanced 2.5/3D electronics — commercial-off the-shelf (COTS) —packages of different configurations assembled onto printed circuit boards (PCBs). Three key approaches were considered for evaluation. The first approach focused on the through-mold via (TMV™) technology at assembly level. The second approach focused on evaluation of 2.5D (also known as, System in Package (SiP)) in fine pitch ball grid array (FPGA). The third approach focused on evaluation of through-silicone-via (TSV) technologies. This report presents the test results for TMV™ and SiP packaging technologies and reliability, and it also provides lessons learned on quality assurance methods. Specifically, the report presents the test matrix for various 3D TMV™ packaging assembly configurations and reliability characterizations performed under two accelerated thermal cycling (ATC) and accelerated thermal shock cycling (ATSC) conditions. The ATC and ATSC were performed in the range of –55°C to 125°C and –100°C to 100°C, respectively. The report also includes assembly of a SiP— a 60-mm fine-pitch ball-grid array (FPGA) interposer with an IC at the center and six chip-scale package (CSP) daisy chains at the periphery—with package assembly characterizations. After assembly, the daisy chains were subjected to ATCs in the range of –40°C to 125°C for reliability evaluation. Finally, for both TMV™ and SiP packaging configurations, characterizations results by X-ray, optical imaging, and daisy-chain resistance evaluations were also presented.

Ghaffarian, Reza↗

A production parylene coating process for hybrid microcircuits

The real impetus for developing a production parylene coating process for internal hybrid passivation came as a result of the possibility of loose conductive particles in hybrid microelectronic circuits, causing intermittent and sometimes permanent failures. Because of the excellent mechanical properties of parylene, it is capable of securing the loose particles in place and prevent such failures. The process of coating described consists of (1) vaporizing the initial charge, which is in the form of a dimer; (2) conversion of the dimer into a reactive monomer; and (3) deposition and subsequent polymerization of the monomer in the deposition chamber which forms a uniform parylene film over all the cold surfaces in contact. Experimental results are discussed in terms of wire bond reliability, resistor drift, high-temperature storage characteristics of parylene, and coating acceptance standards. It is concluded that internal cavities of microelectronic circuits can be successfully coated with parylene provided appropriate tooling is used to protect external leads from the parylene monomer.

Kale, V. S.↗

Precision calibration and reference voltage source for data acquisition systems

Hybrid integrated circuit operational amplifiers, which have inherent characteristics of low quiescent power dissipation and extended operational lifetime with high reliability, are source for digital systems. Amplifiers are coupled to Zener reference diode in current control and buffer configuration.

Source record↗