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At least 343 records · Page 19

StructuredFuzzer: Fuzzing Structured Text-Based Control Logic Applications

Rigorous testing methods are essential for ensuring the security and reliability of industrial controller software. Fuzzing, a technique that automatically discovers software bugs, has also proven effective in finding software vulnerabilities. Unsurprisingly, fuzzing has been applied to a wide range of platforms, including programmable logic controllers (PLCs). However, current approaches, such as coverage-guided evolutionary fuzzing implemented in the popular fuzzer American Fuzzy Lop Plus Plus (AFL++), are often inadequate for finding logical errors and bugs in PLC control logic applications. They primarily target generic programming languages like C/C++, Java, and Python, and do not consider the unique characteristics and behaviors of PLCs, which are often programmed using specialized programming languages like Structured Text (ST). Furthermore, these fuzzers are ill suited to deal with complex input structures encapsulated in ST, as they are not specifically designed to generate appropriate input sequences. This renders the application of traditional fuzzing techniques less efficient on these platforms. To address this issue, this paper presents a fuzzing framework designed explicitly for PLC software to discover logic bugs in applications written in ST specified by the IEC 61131-3 standard. The proposed framework incorporates a custom-tailored PLC runtime and a fuzzer designed for the purpose. We demonstrate its effectiveness by fuzzing a collection of ST programs that were crafted for evaluation purposes. We compare the performance against a popular fuzzer, namely, AFL++. The proposed fuzzing framework demonstrated its capabilities in our experiments, successfully detecting logic bugs in the tested PLC control logic applications written in ST. On average, it was at least 83 times faster than AFL++, and in certain cases, for example, it was more than 23,000 times faster.

47 OTHER INSTRUMENTATION↗

User's manual for rocket combustor interactive design (ROCCID) and analysis computer program. Volume 1: User's manual

The user's manual for the rocket combustor interactive design (ROCCID) computer program is presented. The program, written in Fortran 77, provides a standardized methodology using state of the art codes and procedures for the analysis of a liquid rocket engine combustor's steady state combustion performance and combustion stability. The ROCCID is currently capable of analyzing mixed element injector patterns containing impinging like doublet or unlike triplet, showerhead, shear coaxial, and swirl coaxial elements as long as only one element type exists in each injector core, baffle, or barrier zone. Real propellant properties of oxygen, hydrogen, methane, propane, and RP-1 are included in ROCCID. The properties of other propellants can easily be added. The analysis model in ROCCID can account for the influence of acoustic cavities, helmholtz resonators, and radial thrust chamber baffles on combustion stability. ROCCID also contains the logic to interactively create a combustor design which meets input performance and stability goals. A preliminary design results from the application of historical correlations to the input design requirements. The steady state performance and combustion stability of this design is evaluated using the analysis models, and ROCCID guides the user as to the design changes required to satisfy the user's performance and stability goals, including the design of stability aids. Output from ROCCID includes a formatted input file for the standardized JANNAF engine performance prediction procedure.

Muss, J. A.↗

Cyber-Informed Engineering (CIE) – Engineered Controls Database and Use

Cyber-Informed Engineering (CIE) addresses the reality that cyber-attacks on engineered systems can have consequences far beyond data loss or disruption of digital networks. When control systems are compromised, safety, reliability, and performance of the physical process itself may be threatened. This database is meant to establish clear examples and guidance for defining and applying engineered controls in CIE. It explains what engineered controls are, how they differ from information security measures, and how they are integrated into system design. The goal is to ensure that resilience is engineered into systems from the outset. Unlike cybersecurity protections that defend the digital layer, engineered controls act directly at the physical and algorithmic levels to guarantee that unacceptable consequences are prevented or limited. CIE keeps the consequences of a cyber attack from impacting the safety, reliability, and performance of engineered systems.

42 - ENGINEERING↗

User's manual for rocket combustor interactive design (ROCCID) and analysis computer program. Volume 2: Appendixes A-K

The appendices A-K to the user's manual for the rocket combustor interactive design (ROCCID) computer program are presented. This includes installation instructions, flow charts, subroutine model documentation, and sample output files. The ROCCID program, written in Fortran 77, provides a standardized methodology using state of the art codes and procedures for the analysis of a liquid rocket engine combustor's steady state combustion performance and combustion stability. The ROCCID is currently capable of analyzing mixed element injector patterns containing impinging like doublet or unlike triplet, showerhead, shear coaxial and swirl coaxial elements as long as only one element type exists in each injector core, baffle, or barrier zone. Real propellant properties of oxygen, hydrogen, methane, propane, and RP-1 are included in ROCCID. The properties of other propellants can be easily added. The analysis models in ROCCID can account for the influences of acoustic cavities, helmholtz resonators, and radial thrust chamber baffles on combustion stability. ROCCID also contains the logic to interactively create a combustor design which meets input performance and stability goals. A preliminary design results from the application of historical correlations to the input design requirements. The steady state performance and combustion stability of this design is evaluated using the analysis models, and ROCCID guides the user as to the design changes required to satisfy the user's performance and stability goals, including the design of stability aids. Output from ROCCID includes a formatted input file for the standardized JANNAF engine performance prediction procedure.

Muss, J. A.↗

Fuzzy Adaptive Control for Intelligent Autonomous Space Exploration Problems

The principal objective of the research reported here is the re-design, analysis and optimization of our newly developed neural network fuzzy adaptive controller model for complex processes capable of learning fuzzy control rules using process data and improving its control through on-line adaption. The learned improvement is according to a performance objective function that provides evaluative feedback; this performance objective is broadly defined to meet long-range goals over time. Although fuzzy control had proven effective for complex, nonlinear, imprecisely-defined processes for which standard models and controls are either inefficient, impractical or cannot be derived, the state of the art prior to our work showed that procedures for deriving fuzzy control, however, were mostly ad hoc heuristics. The learning ability of neural networks was exploited to systematically derive fuzzy control and permit on-line adaption and in the process optimize control. The operation of neural networks integrates very naturally with fuzzy logic. The neural networks which were designed and tested using simulation software and simulated data, followed by realistic industrial data were reconfigured for application on several platforms as well as for the employment of improved algorithms. The statistical procedures of the learning process were investigated and evaluated with standard statistical procedures (such as ANOVA, graphical analysis of residuals, etc.). The computational advantage of dynamic programming-like methods of optimal control was used to permit on-line fuzzy adaptive control. Tests for the consistency, completeness and interaction of the control rules were applied. Comparisons to other methods and controllers were made so as to identify the major advantages of the resulting controller model. Several specific modifications and extensions were made to the original controller. Additional modifications and explorations have been proposed for further study. Some of these are in progress in our laboratory while others await additional support. All of these enhancements will improve the attractiveness of the controller as an effective tool for the on line control of an array of complex process environments.

Esogbue, Augustine O.↗

Automating analog design: Taming the shrew

The pace of progress in the design of integrated circuits continues to amaze observers inside and outside of the industry. Three decades ago, a 50 transistor chip was a technological wonder. Fifteen year later, a 5000 transistor device would 'wow' the crowds. Today, 50,000 transistor chips will earn a 'not too bad' assessment, but it takes 500,000 to really leave an impression. In 1975 a typical ASIC device had 1000 transistors, took one year to first samples (and two years to production) and sold for about 5 cents per transistor. Today's 50,000 transistor gate array takes about 4 months from spec to silicon, works the first time, and sells for about 0.02 cents per transistor. Fifteen years ago, the single most laborious and error prone step in IC design was the physical layout. Today, most IC's never see the hand of a layout designer: and automatic place and route tool converts the engineer's computer captured schematic to a complete physical design using a gate array or a library of standard cells also created by software rather than by designers. CAD has also been a generous benefactor to the digital design process. The architect of today's digital systems creates the design using an RTL or other high level simulator. Then the designer pushes a button to invoke the logic synthesizer-optimizer tool. A fault analyzer checks the result for testability and suggests where scan based cells will improve test coverage. One obstinate holdout amidst this parade of progress is the automation of analog design and its reduction to semi-custom techniques. This paper investigates the application of CAD techniques to analog design.

Barlow, A.↗

SLS Block 1-B and Exploration Upper Stage Navigation System Design

The SLS Block 1B vehicle is planned to extend NASA's heavy lift capability beyond the initial SLS Block 1 vehicle. The most noticeable change for this vehicle from SLS Block 1 is the swapping of the upper stage from the Interim Cryogenic Propulsion stage (ICPS), a modified Delta IV upper stage, to the more capable Exploration Upper Stage (EUS). As the vehicle evolves to provide greater lift capability and execute more demanding missions so must the SLS Integrated Navigation System to support those missions. The SLS Block 1 vehicle carries two independent navigation systems. The responsibility of the two systems is delineated between ascent and upper stage flight. The Block 1 navigation system is responsible for the phase of flight between the launch pad and insertion into Low-Earth Orbit (LEO). The upper stage system assumes the mission from LEO to payload separation. For the Block 1B vehicle, the two functions are combined into a single system intended to navigate from ground to payload insertion. Both are responsible for self-disposal once payload delivery is achieved. The evolution of the navigation hardware and algorithms from an inertial-only navigation system for Block 1 ascent flight to a tightly coupled GPS-aided inertial navigation system for Block 1-B is described. The Block 1 GN&C system has been designed to meet a LEO insertion target with a specified accuracy. The Block 1-B vehicle navigation system is designed to support the Block 1 LEO target accuracy as well as trans-lunar or trans-planetary injection accuracy. This is measured in terms of payload impact and stage disposal requirements. Additionally, the Block 1-B vehicle is designed to support human exploration and thus is designed to minimize the probability of Loss of Crew (LOC) through high-quality inertial instruments and Fault Detection, Isolation, and Recovery (FDIR) logic. The preliminary Block 1B integrated navigation system design is presented along with the challenges associated with meeting the design objectives. This paper also addresses the design considerations associated with the use of Block 1 and Commercial Off-the-Shelf (COTS) avionics for Block 1-B/EUS as part of an integrated vehicle suite for orbital operations.

Oliver, T. Emerson↗

A review of cryogenic testing performed by the thermochemical test branch, Manned Spacecraft Center in support of Apollo 13 and14

The Apollo 13 anomaly provided considerable impetus for a variety of types of cryogenic and ignition tests. The logic of the various test program designs, the test techniques, and their final impact upon the investigation findings are described. In addition, several test programs initiated to determine the thermal performance and general performance characteristics of the redesigned Apollo 14 cryogenic storage system are presented.

Propp, C. E.↗

Process development of beam-lead silicon-gate COS/MOS integrated circuits

Two processes for the fabrication of beam-leaded COS/MOS integrated circuits are described. The first process utilizes a composite gate dielectric of 800 A of silicon dioxide and 450 A of pyrolytically deposited A12O3 as an impurity barrier. The second process utilizes polysilicon gate metallization over which a sealing layer of 1000 A of pyrolytic Si3N4 is deposited. Three beam-lead integrated circuits have been implemented with the first process: (1) CD4000BL - three-input NOR gate; (2) CD4007BL - triple inverter; and (3) CD4013BL - dual D flip flop. An arithmetic and logic unit (ALU) integrated circuit was designed and implemented with the second process. The ALU chip allows addition with four bit accuracy. Processing details, device design and device characterization, circuit performance and life data are presented.

Baptiste, B.↗

Numerical aerodynamic simulation facility preliminary study, volume 1

A technology forecast was established for the 1980-1985 time frame and the appropriateness of various logic and memory technologies for the design of the numerical aerodynamic simulation facility was assessed. Flow models and their characteristics were analyzed and matched against candidate processor architecture. Metrics were established for the total facility, and housing and support requirements of the facility were identified. An overview of the system is presented, with emphasis on the hardware of the Navier-Stokes solver, which is the key element of the system. Software elements of the system are also discussed.

Source record↗

Subsonic balance and pressure investigation of a 60 deg delta wing with leading edge devices

Low supersonic wave drag makes the thin highly swept delta wing the logical choice for use on aircraft designed for supersonic cruise. However, the high-lift maneuver capability of the aircraft is limited by severe induced-drag penalties attributed to loss of potential flow leading-edge suction. This drag increase may be alleviated through leading-edge flow control to recover lost aerodynamic thrust through either retention of attached leading-edge flow to higher angles of attack or exploitation of the increased suction potential of separation-induced vortex flow. A low-speed wind-tunnel investigation was undertaken to examine the high-lift devices such as fences, chordwise slots, pylon vortex generators, leading-edge vortex flaps, and sharp leading-edge extensions. The devices were tested individually and in combinations in an attempt to improve high-alpha drag performance with a minimum of low-alpha drag penalty. This report presents an analysis of the force, moment, and static pressure data obtained in angles of attack up to 23 deg, at Mach and Reynolds numbers of 0.16 and 3.85 x 10 to the 6th power per meter, respectively. The results indicate that all the devices produced drag and longitudinal/lateral stability improvements at high lift with, in most cases, minor drag penalties at low angles of attack.

Tingas, S. A.↗

Computer Language For Optimization Of Design

SOL is computer language geared to solution of design problems. Includes mathematical modeling and logical capabilities of computer language like FORTRAN; also includes additional power of nonlinear mathematical programming methods at language level. SOL compiler takes SOL-language statements and generates equivalent FORTRAN code and system calls. Provides syntactic and semantic checking for recovery from errors and provides detailed reports containing cross-references to show where each variable used. Implemented on VAX/VMS computer systems. Requires VAX FORTRAN compiler to produce executable program.

Scotti, Stephen J.↗

Use of CCSDS Packets Over SpaceWire to Control Hardware

For the Lunar Reconnaissance Orbiter, the Command and Data Handling subsystem consisted of several electronic hardware assemblies that were connected with SpaceWire serial links. Electronic hardware would be commanded/controlled and telemetry data was obtained using the SpaceWire links. Prior art focused on parallel data buses and other types of serial buses, which were not compatible with the SpaceWire and the core flight executive (CFE) software bus. This innovation applies to anything that utilizes both SpaceWire networks and the CFE software. The CCSDS (Consultative Committee for Space Data Systems) packet contains predetermined values in its payload fields that electronic hardware attached at the terminus of the SpaceWire node would decode, interpret, and execute. The hardware s interpretation of the packet data would enable the hardware to change its state/configuration (command) or generate status (telemetry). The primary purpose is to provide an interface that is compatible with the hardware and the CFE software bus. By specifying the format of the CCSDS packet, it is possible to specify how the resulting hardware is to be built (in terms of digital logic) that results in a hardware design that can be controlled by the CFE software bus in the final application

Haddad, Omar↗

Design and Stability of an On-Orbit Attitude Control System Using Reaction Control Thrusters

Basic principles for the design and stability of a spacecraft on-orbit attitude control system employing on-off Reaction Control System (RCS) thrusters are presented. Both vehicle dynamics and the control system actuators are inherently nonlinear, hence traditional linear control system design approaches are not directly applicable. This paper has two main aspects: It summarizes key RCS design principles from earlier NASA vehicles, notably the Space Shuttle and Space Station programs, and introduces advances in the linear modelling and analyses of a phase plane control system derived in the initial development of the NASA's next upper stage vehicle, the Exploration Upper Stage (EUS). Topics include thruster hardware specifications, phase plane design and stability, jet selection approaches, filter design metrics, and RCS rotational maneuver logic.

Hall, Robert A.↗

Summary report: A preliminary investigation into the use of fuzzy logic for the control of redundant manipulators

The Rice University Department of Mechanical Engineering and Materials Sciences' Robotics Group designed and built an eight degree of freedom redundant manipulator. Fuzzy logic was proposed as a control scheme for tasks not directly controlled by a human operator. In preliminary work, fuzzy logic control was implemented for a camera tracking system and a six degree of freedom manipulator. Both preliminary systems use real time vision data as input to fuzzy controllers. Related projects include integration of tactile sensing and fuzzy control of a redundant snake-like arm that is under construction.

Cheatham, John B., Jr.↗

Single chip fixed frequency bit synchronizer

A single chip, fixed frequency suboptimum bit synchronizer design which was implemented utilizing a programmable logic device is described. The bit synchronizer is modeled after a digital transition tracking loop for symbol estimation and employs a first-order incremental phase modulator for closed-loop symbol synchronization. The BER and tracking performance is modeled and compared to optimum designs. The bit synchronizer was developed for the Space Shuttle.

Butler, Madeline J.↗

Combining Video Memory Operations

Designs of video random-access memory (VRAM) integrated circuits operating under control by external logic circuits simplified according to concept of combining two memory operations performed separately heretofore. Eliminates need for DRAM-refresh timers and counters, reducing amount of circuitry needed to control VRAM thereby reducing time needed to design VRAM. Simplification also reduces time needed to redesign DRAM-refresh logic circuitry when adapting VRAM design to another VRAM for which timing specifications different. Concept can be applied to VRAM clocking data out to display unit continuously.

Kania, Michael J.↗