X2000 command and data handling system development
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X2000 system flight computer non-volatile memory p↗
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Results for “Non-Volatile”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Synthesis and characterization of nanometer-scale structures for electronic devices
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non-volatile memory single electronics nanocrystal↗
Optically Addressable Ferroelectric Memory and its Applications
The objective of this task was to critically assess the potential of the concept of.
ferroelectric memory non-volatile memories NDRO no↗
Charging of single Si nanocrystals by atomic force microscopy
Conducting-tip atomic force microscopy (AFM)has been used to electronically probe silicon nanocrystals on an insulating substrate.
non-volatile memory↗
Contamination Control for the Earth Observing System (EOS) Multiangle Imaging Spectro-Radiometer (MISR)
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signal-throughput degradation transport factors fl↗
Evaluation of Radiation Effects in Flash Memories
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single-voltage non-volatility Radiation Effects Sa↗
The Effect of Integration of Strontium-Bismuth-Tantalate Capacitors onto SOI Wafers
We report for the first time the successful integration of Strontium-Bismuth-Tantalate ferroelectric capacitors on an SOI Substrate. We have verified that the unique processing requirements of SBT capacitors does not affect the properties of the surrounding FD-SOI transistors, and, conversely, we have verified that the SOI processing does not affect the quality of the SBT capacitors.
memory↗
Single-Event Effect Performance of a Commercial ReRAM
We show heavy ion test results of a commercial production-level ReRAM. The memory array is robust to bit upsets. However the ReRAM system is vulnerable to SEFI.
ReRAM↗
Single-Event Effect Performance of a Conductive-Bridge Memory EEPROM
We investigated the heavy ion SEE characteristics of an EEPROM based on CBRAM technology. SEFI is the dominant type of SEE for each operating mode (standby, read-only, write/read). We also observed single bit upsets in the CBRAM cell, during write/read tests. the SEULET threshold is between 10 and 20 MeV * sq cm/mg, with an upper fluence limit of 3 × 10(exp 6) cm(exp -2) at 10 MeV * sq cm/mg. In the stand by mode, the CBRAM array appears immune to bit upsets.
single event effects↗
One Time Programmable Antifuse Memory Based on Bulk Junctionless Transistor
One time programmable (OTP) antifuse base memory is demonstrated based on a bulk junctionless gate-all-around (GAA) nanowire transistor technology. The presented memory consists of a single transistor (1T) footprint without any process modification. The source/drain (S/D) and gate respectively become bit line and word line where the antifuse is formed by oxide breakdown across the gate and the channel. The channel is connected directly to the bit line due to junctionless S/D and inherently isolated from the neighboring cell by the GAA channel. Therefore, an array of 1T antifuse OTP can be a candidate for the sub-5-nanometer technology node.
Antifuse↗
Contamination Control for the Earth Observing System (EOS) Multi-angle Imaging Spectro-Radiometer (MISR)
The contamination control activity performed for the Multi-Angle Imaging Spectro-Radiometer (MISR) consisted of an overall system analysis for susceptibility to molecular and particulate contamination from both internal and external sources at the most sensitive sensor wavelength.
molecular↗