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The results of an optimization effort to achieve a minimum weight configuration for a magnetic section circuit (MSC) used in the magnetic portion of a double-focusing mass spectrometer is presented.
An output device for optimizing propagation delay and minimizing chip area is described. An optimum means of tapering the output stages to minimize propagation delay is determined. The minimum delay is a function of the capacitive load to node ratio, the number of output stages, and the interstage propagation delay. The effects on area are also presented. A figure of merit which is a function of area and propagation time is defined which is of use in designing output stages. An optimum exists which can be considered the best compromise between further decreasing propagation delay and increasing chip area. Data are also presented which allow a designer to determine the minimum chip area once the capacitive load and the maximum allowable delay are known.
An application specific integrated circuit is optimized by translating a first representation of its digital design to a second representation. The second representation includes multiple syntactic expressions that admit a representation of a higher-order function of base Boolean values. The syntactic expressions are manipulated to form a third representation of the digital design.
Report analyzes costs of developing and producing low-production-volume, customized VLSI (very large-scale, integrated) circuits. Relationship is developed between IC cost and electronic system cost using IC cost models based on design/fabrication approach. Emphasis is on development of understanding between cost and volume for custom circuits to be used by NASA. Reliability is major cost component in models. Report is divided into five sections and includes four appendices with useful reference literature.
The variational quantum eigenvalue solver is a powerful hybrid quantum-classical approach that has been suggested as a candidate method to run on near-term quantum hardware for computing ground state electronic energies of molecular systems. However, even for small molecules, the number of variational parameters and qubits required to minimize the electronic energy is beyond the reach of current quantum computers except for small basis sets. We explore a new paradigm for state preparation where we test how much of the optimization can be approximately prepared with classical computers to reduce the number of optimization steps performed using a quantum device. By adapting a recent algorithm for the factorized form of the UCC ansatz, we can study molecular electronic structure problems with up to 64 qubits. In addition, we also test a related approach of using tensor networks to optimize quantum circuits in order to benchmark various lattice models. We present results using these approaches and discuss strategies for incorporating these ideas into variational algorithms involving near-term quantum computers. Our results help demonstrate the strength of the UCC ansatz and address pressing questions about optimal initial parameterizations and circuit construction.
Unitary coupled cluster theory (UCC) is a common wave function ansatz for quantum simulation of molecular electronic structure using the variational quantum eigenvalue solver (VQE). Even for small molecules using a double-ζ basis, the number of variational parameters required to minimize the electronic energy (i.e., optimize the circuit) is large and beyond the reach of current quantum computers. For example, a circuit simulating C2 using the UCCSD ansatz and the cc-pVDZ basis set with frozen-core will require over 10,000 variational parameters and a Hilbert space of over 10^8 determinants. To make progress on simulating such molecular systems on near-term quantum computers, we explore how much of the optimization can be approximately prepared with classical simulation while reducing the number of optimization steps performed on a quantum device. Recently, Chen, Cheng, and Freericks [J. Chem. Theory Comput. 2021, 17, 841-847] presented an algorithm for the factorized form of the UCC ansatz that allows for efficient UCC optimizations on classical hardware. We flip the algorithm around and use it to prepare approximate quantum circuits for systems that require a large number of qubits to represent. We will present results from our implementation and discuss strategies for incorporating this implementation for algorithms involving near-term quantum computers.
Unitary coupled cluster theory (UCC) is a common wave function ansatz for quantum simulation of molecular electronic structure using the variational quantum eigenvalue solver (VQE). Even for small molecules using a double-ζ basis, the number of variational parameters required to minimize the electronic energy (i.e., optimize the circuit) is large and beyond the reach of current quantum computers. For example, a circuit simulating C2 using the UCCSD ansatz and the cc-pVDZ basis set with frozen-core will require over 10,000 variational parameters and a Hilbert space of over 10^(8) determinants. To make progress on simulating such molecular systems on near-term quantum computers, we explore how much of the optimization can be approximately prepared with classical simulation while reducing the number of optimization steps performed on a quantum device. Recently, Chen, Cheng, and Freericks [J. Chem. Theory Comput. 2021, 17, 841-847] presented an algorithm for the factorized form of the UCC ansatz that allows for efficient UCC optimizations on classical hardware. We flip the algorithm around and use it to prepare approximate quantum circuits for systems that require a large number of qubits to represent. We will present results from our implementation and discuss strategies for incorporating this implementation for algorithms involving near-term quantum computers.
Unitary coupled cluster theory (UCC) is a common wave function ansatz for quantum simulation of molecular electronic structure using the variational quantum eigenvalue solver (VQE). Even for small molecules using a double-ζ basis, the number of variational parameters required to minimize the electronic energy (i.e., optimize the circuit) is large and beyond the reach of current quantum computers. For example, a circuit simulating C2 using the UCCSD ansatz and the cc-pVDZ basis set with frozen-core will require over 10,000 variational parameters and a Hilbert space of over 10^(8) determinants. To make progress on simulating such molecular systems on near-term quantum computers, we explore how much of the optimization can be approximately prepared with classical simulation while reducing the number of optimization steps performed on a quantum device. Recently, Chen, Cheng, and Freericks [J. Chem. Theory Comput. 2021, 17, 841-847] presented an algorithm for the factorized form of the UCC ansatz that allows for efficient UCC optimizations on classical hardware. We flip the algorithm around and use it to prepare approximate quantum circuits for systems that require a large number of qubits to represent. We will present results from our implementation and discuss strategies for incorporating this implementation for algorithms involving near-term quantum computers.
Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost.
The current generation of submillimeter-wave instruments is relatively mass and power-hungry. The receiver front ends (RFEs) of a submillimeter instrument form the heart of the instrument, and any mass reduction achieved in this subsystem is propagated through the instrument. In the current implementation, the RFE consists of different blocks for the mixer and LO circuits. The motivation for this work is to reduce the mass of the RFE by integrating the mixer and LO circuits in one waveguide block. The mixer and its associated LO chips will all be packaged in a single waveguide package. This will reduce the mass of the RFE and also provide a number of other advantages. By bringing the mixer and LO circuits close together, losses in the waveguide will be reduced. Moreover, the compact nature of the block will allow for better thermal control of the block, which is important in order to reduce gain fluctuations. A single waveguide block with a 600- GHz RFE functionality (based on a subharmonically pumped Schottky diode pair) has been demonstrated. The block is about 3x3x3 cubic centimeters. The block combines the mixer and multiplier chip in a single package. 3D electromagnetic simulations were carried out to design the waveguide circuit around the mixer and multiplier chip. The circuit is optimized to provide maximum output power and maximum bandwidth. An integrated submillimeter front end featuring a 520-600-GHz sub-harmonic mixer and a 260-300-GHz frequency tripler in a single cavity was tested. Both devices used GaAs MMIC membrane planar Schottky diode technology. The sub-harmonic mixer/tripler circuit has been tested using conventional metal-machined blocks. Measurement results on the metal block give best DSB (double sideband) mixer noise temperature of 2,360 K and conversion losses of 7.7 dB at 520 GHz. The LO input power required to pump the integrated tripler/sub-harmonic mixer is between 30 and 50 mW.
In order to demonstrate non-trivial quantum computations experimentally, such as the synthesis of arbitrary entangled states, it will be useful to nderstand how to decompose a desired quantum computation into the shortest possible sequence of one-qubit and two-qubit gates. We contribute to this effort by providing a method to construct an optimal quantum circuit for a general two-qubit gate that requires at most 3 CNOT gates and 15 elementary one qubit gates. We then prove that these constructions are optimal with respect to the family of CNOT, y-rotation, z-rotation, and phase gates.
Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.
Optimization of microcircuit reliability
Optimal directed circuit and cycle elimination in weighted diagraphs by edge reversal orientation
Ion engine with magnetic circuit for optimal discharge
Concepts and techniques for identifying and simulating both the steady state and dynamic characteristics of electrical loads for use during integrated system test and evaluation are discussed. The investigations showed that it is feasible to design and develop interrogation and simulation equipment to perform the desired functions. During the evaluation, actual spacecraft loads were interrogated by stimulating the loads with their normal input voltage and measuring the resultant voltage and current time histories. Elements of the circuits were optimized by an iterative process of selecting element values and comparing the time-domain response of the model with those obtained from the real equipment during interrogation.
Means are described to use SQUID magnetometer flux counting and the London moment of a spherical superconducting gyroscope to read out the gyroscope spin axis direction to an accuracy of at least 23 bits per quadrant. The system is discussed in analogy to optical fringe counting as applied to distance measurement. Several methods of applying both analog and digital SQUID magnetometers to the readout problem are given, as well as limitations on each. Described are two methods of increasing the flux available for measurement: magnetizing the gyroscope with a trapped field, and optimizing readout circuit inductances. Finally, the same principle on which the gyroscope readout is based is applied to a description of a high accuracy, flux counting, digital angle encoder.
An analysis is presented which integrates the results of specific studies in the areas of photovoltaic structural design optimization, optimization of array series/parallel circuit design, thermal design optimization, and optimization of environmental protection features. The analysis is based on minimizing the total photovoltaic system life-cycle energy cost including repair and replacement of failed cells and modules. This approach is shown to be a useful technique for array optimization, particularly when time-dependent parameters such as array degradation and maintenance are involved.