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At least 37 records · Page 2

A microprocessor-based one dimensional optical data processor for spatial frequency analysis

A high degree of accuracy was obtained in measuring the spatial frequency spectrum of known samples using an optical data processor based on a microprocessor, which reliably collected intensity versus angle data. Stray light control, system alignment, and angle measurement problems were addressed and solved. The capabilities of the instrument were extended by the addition of appropriate optics to allow the use of different wavelengths of laser radiation and by increasing the travel limits of the rotating arm to + or - 160 degrees. The acquisition, storage, and plotting of data by the computer permits the researcher a free hand in data manipulation such as subtracting background scattering from a diffraction pattern. Tests conducted to verify the operation of the processor using a 25 mm diameter pinhole, a 39.37 line pairs per mm series of multiple slits, and a microscope slide coated with 1.091 mm diameter polystyrene latex spheres are described.

Collier, R. L.

Initializing Embedded Data Processors From A Single Source

Initial-computer-program-loading system provides startup information to all embedded data processors (EDP's) in general-purpose computer system. Remote processors given image of startup diskette so real local diskette and drive unneeded. System less complex and equipment costs less. Additional benefit, initial program loading tests bus. If boot-up program transmitted correctly, bus assumed to be operating properly.

Chavez, Edward A.

A conceptual, parallel operating data compression processor

Data compressor processor concept envisions a simplified system for telemetry communications. It is simultaneously a zero-order processor and a floating aperture, a variable aperture, and a binary integer aperture with a decoded buffet fullness counter.

Anderson, T. O.

A High-Throughput, Adaptive FFT Architecture for FPGA-Based Space-Borne Data Processors

Historically, computationally-intensive data processing for space-borne instruments has heavily relied on ground-based computing resources. But with recent advances in functional densities of Field-Programmable Gate-Arrays (FPGAs), there has been an increasing desire to shift more processing on-board; therefore relaxing the downlink data bandwidth requirements. Fast Fourier Transforms (FFTs) are commonly used building blocks for data processing applications, with a growing need to increase the FFT block size. Many existing FFT architectures have mainly emphasized on low power consumption or resource usage; but as the block size of the FFT grows, the throughput is often compromised first. In addition to power and resource constraints, space-borne digital systems are also limited to a small set of space-qualified memory elements, which typically lag behind the commercially available counterparts in capacity and bandwidth. The bandwidth limitation of the external memory creates a bottleneck for a large, high-throughput FFT design with large block size. In this paper, we present the Multi-Pass Wide Kernel FFT (MPWK-FFT) architecture for a moderately large block size (32K) with considerations to power consumption and resource usage, as well as throughput. We will also show that the architecture can be easily adapted for different FFT block sizes with different throughput and power requirements. The result is completely contained within an FPGA without relying on external memories. Implementation results are summarized.

Nguyen, Kayla

Element Load Data Processor (ELDAP) Users Manual

Often, the shear and tensile forces and moments are extracted from finite element analyses to be used in off-line calculations for evaluating the integrity of structural connections involving bolts, rivets, and welds. Usually the maximum forces and moments are desired for use in the calculations. In situations where there are numerous structural connections of interest for numerous load cases, the effort in finding the true maximum force and/or moment combinations among all fasteners and welds and load cases becomes difficult. The Element Load Data Processor (ELDAP) software described herein makes this effort manageable. This software eliminates the possibility of overlooking the worst-case forces and moments that could result in erroneous positive margins of safety and/or selecting inconsistent combinations of forces and moments resulting in false negative margins of safety. In addition to forces and moments, any scalar quantity output in a PATRAN report file may be evaluated with this software. This software was originally written to fill an urgent need during the structural analysis of the Ares I-X Interstage segment. As such, this software was coded in a straightforward manner with no effort made to optimize or minimize code or to develop a graphical user interface.

Ramsey, John K., Jr.

The software system development for the TAMU real-time fan beam scatterometer data processors

A software package was designed and written to process in real-time any one quadrature channel pair of radar scatterometer signals form the NASA L- or C-Band radar scatterometer systems. The software was successfully tested in the C-Band processor breadboard hardware using recorded radar and NERDAS (NASA Earth Resources Data Annotation System) signals as the input data sources. The processor development program and the overall processor theory of operation and design are described. The real-time processor software system is documented and the results of the laboratory software tests, and recommendations for the efficient application of the data processing capabilities are presented.

Clark, B. V.

The data processor from the small scientific satellite

A reprogrammable data system aboard a small scientific satellite is described that samples and processes magnetospheric measurements for transmission to the ground. The lightweight configuration of the data system is made up of the program memory, data storage, input/output module, and a central processing unit. The system is designed for multiple missions.

Mccain, H. G.

Memory Network For Distributed Data Processors

Universal Memory Network (UMN) is modular, digital data-communication system enabling computers with differing bus architectures to share 32-bit-wide data between locations up to 3 km apart with less than one millisecond of latency. Makes it possible to design sophisticated real-time and near-real-time data-processing systems without data-transfer "bottlenecks". This enterprise network permits transmission of volume of data equivalent to an encyclopedia each second. Facilities benefiting from Universal Memory Network include telemetry stations, simulation facilities, power-plants, and large laboratories or any facility sharing very large volumes of data. Main hub of UMN is reflection center including smaller hubs called Shared Memory Interfaces.

Bolen, David

Charge-coupled device data processor for an airborne imaging radar system

Processing of raw analog echo data from synthetic aperture radar receiver into images on board an airborne radar platform is discussed. Processing is made feasible by utilizing charge-coupled devices (CCD). CCD circuits are utilized to perform input sampling, presumming, range correlation and azimuth correlation in the analog domain. These radar data processing functions are implemented for single-look or multiple-look imaging radar systems.

Arens, W. E.

Spacecube: A Family of Reconfigurable Hybrid On-Board Science Data Processors

SpaceCube is a family of Field Programmable Gate Array (FPGA) based on-board science data processing systems developed at the NASA Goddard Space Flight Center (GSFC). The goal of the SpaceCube program is to provide 10x to 100x improvements in on-board computing power while lowering relative power consumption and cost. SpaceCube is based on the Xilinx Virtex family of FPGAs, which include processor, FPGA logic and digital signal processing (DSP) resources. These processing elements are leveraged to produce a hybrid science data processing platform that accelerates the execution of algorithms by distributing computational functions to the most suitable elements. This approach enables the implementation of complex on-board functions that were previously limited to ground based systems, such as on-board product generation, data reduction, calibration, classification, eventfeature detection, data mining and real-time autonomous operations. The system is fully reconfigurable in flight, including data parameters, software and FPGA logic, through either ground commanding or autonomously in response to detected eventsfeatures in the instrument data stream.

reconfigurable computing

Meteorological rocket data processor and results from the solar eclipse of 7 March 1970.

A comprehensive digital computer program is described which automatically processes precision digitized data from conventional rocketsondes and radars to produce accurately corrected temperatures and winds together with estimated uncertainties at each point. Underlying models for the systematic errors in the Arcasonde 1A temperature sensor and the radar-tracked parachute wind sensor, and for the uncertainty in corrected results are presented. Techniques used to automatically edit, synchronize and filter data are also given. Performance is illustrated by graphical output from the eight meteorological soundings in the rocket series conducted at Wallops Island, Va., during the Mar. 7, 1970 solar eclipse. An operational version (METROK) of the program is in use at NASA Wallops Station.

Staffanson, F. L.