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22 records · Page 2

Dynamic, symmetry-preserving, and hardware-adaptable circuits for quantum computing many-body states and correlators of the Anderson impurity model

We present a hardware-reconfigurable ansatz on N q -qubits for the variational preparation of many-body states of the Anderson impurity model (AIM) with N imp + N bath = N q /2 sites, which conserves total charge and spin z component within each variational search subspace. The many-body ground state of the AIM is determined as the minimum over all minima of O(N$^2_ q$) distinct charge-spin sectors. Hamiltonian expectation values are shown to require ω(N q ) < N meas. $\leqslant$ O(N imp N bath ) symmetry-preserving, parallelizable measurement circuits, each amenable to postselection. To obtain the one-particle impurity Green’s function we show how initial Krylov vectors can be computed via midcircuit measurement and how Lanczos iterations can be computed using the symmetry-preserving ansatz. For a single-impurity Anderson model with a number of bath sites increasing from one to seven, we show using numerical emulation that the ease of variational ground-state preparation is suggestive of linear scaling in circuit depth and subquartic scaling in optimizer complexity. We therefore expect that, combined with time-dependent methods for Green’s function computation, our ansatz provides a useful tool to account for electronic correlations on early fault-tolerant processors. Finally, with a view towards computing real materials properties of interest like magnetic susceptibilities and electron-hole propagators, we provide a straightforward method to compute many-body, time-dependent correlation functions using a combination of time evolution, midcircuit measurement-conditioned operations, and the Hadamard test.

36 MATERIALS SCIENCE↗

Design and fabrication of ion traps for low RF power dissipation

Large surface-electrode ion traps with multiple trapping regions and junctions are a natural approach to scaling trapped ion quantum computers, supporting the connectivity and ion counts necessary for complex quantum algorithms. However, a major hurdle in this scaling is on-chip power dissipation from the applied RF voltage, which increases at a rate between linear and cubic relative to trap size, depending on whether the losses are dielectric or Ohmic. Here, we present two versions of a trap with features designed to reduce both types of RF power dissipation. The first variant contains a raised RF electrode that increases the electrode–ground distance to reduce capacitance. Different DC voltage sources are demonstrated on this trap to show that technical noise before the filter remains the dominant source of voltage noise and therefore motional heating. The second variant additionally includes a method for removing dielectric from beneath the RF electrode to further reduce dielectric losses. These traps were demonstrated at room temperature with 40 Ca + ions. In conclusion, the similar heating rates and heating rate axial frequency dependencies between 2.4 and 3.0 MHz illustrate that this dielectric modification is not detrimental to trap performance.

Sterk, J. D. [Sandia National Laboratories (SNL-NM↗