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NASA NTRS2019

Cracking Problems in Low-Voltage Chip Ceramic Capacitors

Cracking remains the major reason of failures in multilayer ceramic capacitors (MLCCs) used in in space electronics. Due to a tight quality control of space-grade components, the probability that as manufactured capacitors have cracks is relatively low, and cracking is often occurs during assembly, handling and the following testing of the systems. Majority of capacitors with cracks are revealed during the integration and testing period, but although extremely rarely, defective parts remain undetected and result in failures during the mission. This situation is aggravated by manual soldering and rework that are often used during low volume production of circuit boards for space. Although failures of MLCCs are often attributed to the post-manufacturing stresses, in many cases they are due to a combination of certain deviations in the manufacturing processes that result in hidden defects in the parts and excessive stresses during assembly and use. This report gives an overview of design, manufacturing and testing processes of MLCCs focusing on elements related to cracking problems. The existing and new screening and qualification procedures and techniques are briefly described and assessed by their effectiveness in revealing cracks. The capability of different test methods to simulate stresses resulting in cracking, mechanisms of failures in capacitors with cracks, and possible methods of selecting the most robust to manual soldering stresses capacitors are discussed.

testing↗

NASA NTRS1981

Unstable insulation resistance in ceramic capacitors

The effects of low and varying values of insulation resistance (IR) and their significance in the cause of failure in ceramic capacitors were investigated. Two specific instances involving hardware failure involving ceramic capacitors were examined. It is shown that monolithic, multilayer ceramic capacitors may exhibit low and unstable IR at low voltages, or exhibit no voltage. Other significant results are reported.

Holladay, A. M.↗

NASA NTRS1981

Ultrasonic scanning of multilayer ceramic chip capacitors

Ultrasonic scanning is compared to neutron radiography and scanning laser acoustic microscopy (SLAM). Data show that SLAM and ultrasonic scanning evaluations are in good agreement. There is poor agreement between N-ray and both ultrasonic techniques because N-ray is insensitive to all but the grossest delaminations. Statistical analysis show a good correlation between ultrasonic scanning and destructive physical analysis.

Bradley, F. N.↗

NASA NTRS2014

2014 NEPP Tasks Update for Ceramic and Tantalum Capacitors

Presentation describes recent development in research on MnO2, wet, and polymer tantalum capacitors. Low-voltage failures in multilayer ceramic capacitors and techniques to reveal precious metal electrode (PME) and base metal electrode (BME) capacitors with cracks are discussed. A voltage breakdown technique is suggested to select high quality low-voltage BME ceramic capacitors.

ceramic capacitors↗

NASA NTRS2017

Reliability Issues with PME and BME Ceramic Capacitors

This work is a review of reliability issues specific for low-voltage precious metal electrode (PME) and base metal electrode (BME) multilayer ceramic capacitors (MLCC). A special attention is given to degradation and failures in capacitors with defects, in particular with cracks. Temperature and voltage reliability acceleration factors have been calculated based on approximation of distributions of degradation rates of leakage currents using a general log-linear Weibull model. Results show a substantial difference in behavior of BME and PME capacitors with defects. Mechanisms of degradation and failures in humid and dry environments and risks of overstressing capacitors during highly accelerated life testing (HALT) are discussed.

Teverovsky, Alexander↗

NASA NTRS2015

Evaluation of Case Size 0603 BME Ceramic Capacitors

High volumetric efficiency of commercial base metal electrode (BME) ceramic capacitors allows for a substantial reduction of weight and sizes of the parts compared to currently used military grade precious metal electrode (PME) capacitors. Insertion of BME capacitors in space applications requires a thorough analysis of their performance and reliability. In this work, six types of cases size 0603 BME capacitors from three vendors have been evaluated. Three types of multilayer ceramic capacitors (MLCCs) were designed for automotive industry and three types for general purposes. Leakage currents in the capacitors have been measured in a wide range of voltages and temperatures, and measurements of breakdown voltages (VBR) have been used to assess the proportion and severity of defects in the parts. The effect of soldering-related thermal shock stresses was evaluated by analysis of distributions of VBR for parts in 'as is' condition and after terminal solder dip testing at 350 C. Highly Accelerated Life Testing (HALT) at different temperatures was used to assess the activation energy of degradation of leakage currents and predict behavior of the parts at life test and normal operating conditions. To address issues related to rework and manual soldering, capacitors were soldered onto different substrates at different soldering conditions. The results show that contrary to a common assumption that large-size capacitors are mostly vulnerable to soldering stresses, cracking in small size capacitors does happen unless special measures are taken during assembly processes.

testing↗

DOE OSTI2025

Correcting impedance measurements for background parasitics to characterize circuit components in cryogenic environments

Predictable circuit response is a critical prerequisite for accurate electronic measurements. Here, we describe a powerful yet straightforward experimental method and analysis model that utilizes an affordable LCR meter in conjunction with an in situ parasitic-impedance background-correction procedure to measure the temperature-dependent impedance (magnitude and phase) of up to ten individual passive circuit elements in a single cryostat run. We show how the model unambiguously identified a ∼20× drop in capacitance for 22 μF 5XR multilayer ceramic capacitors cooled from 300 K to 360 mK in an environment with a parasitic capacitance of ∼300 pF. The same experimental procedure, based on a simple two-wire measurement, was also used to measure 10 and 22 pF thin-film capacitors and 100 MΩ thick-film resistors. The results showed that the resistor values increased by up to an order of magnitude when the devices were cooled from 300 K to 360 mK. Most importantly, we showed that the simple data-acquisition method, coupled with our analysis model, enabled the measurement of component parasitics, and effectively extended the accuracy of a commercial LCR meter beyond its manufacturer-guaranteed values for a wide range of measurement frequencies. We also showed that, in the current configuration, our simple approach is limited to a capacitance accuracy of ∼10 pF.

Carpenter, R. J. [Santa Clara Univ., Santa Clara, ↗

DOE OSTI2025

Nucleation and growth of polar clusters with in-phase tilts into a long-range ferroelectric matrix in a sodium niobate based complex relaxor

In this study, we have investigated the temperature dependence of atomic ordering at multiple length scales in a lead-free sodium niobate-based relaxor, i.e., 0.75 NaNbO 3 -0.25 Ba 0.9⁢ Ca 0.1⁢ TiO 3 (NN-25BCT) via synchrotron x-ray diffraction, Raman spectroscopy, and pair distribution function analysis. High-resolution synchrotron x-ray powder diffraction (SXRD) measurements reveal a ferroelectric phase transition in the relaxor ferroelectric NN-25BCT below the Vogel-Fulcher freezing temperature (𝑇 VF ≈ 270 K). In addition, SXRD analysis demonstrates the competition between in-phase octahedral tilting and ferroelectric order at the long-range scale using mode crystallography. On the other hand, Raman spectroscopic analysis provides evidence of polar ordering for 𝑇 > 𝑇 VF (with tetragonal symmetry) persisting up to the Burns temperature (𝑇 B ). Furthermore, pair distribution function (PDF) analysis reveals the presence of a polar antiferrodistortive tetragonal phase with 𝑃⁢4⁢𝑏𝑚 space group at short ranges throughout the studied temperatures (i.e., 110 K ≤ 𝑇 ≤500 K), irrespective of nonpolar long-range ordering above 𝑇 VF . Therefore, our measurements provide direct evidence for the presence of polar ordering at short ranges and their gradual transformation into long-range polar ordering using an integrated multiscale structural analysis. In conclusion, as a result of a transition from relaxor to a ferroelectric phase in the vicinity of room temperature, NN-25BCT can be exploited for applications in pyroelectric detectors, electrocaloric devices, and multilayered ceramic capacitors.

36 MATERIALS SCIENCE↗

NASA NTRS1990

High power density dc-to-dc converters for aerospace applications

Three dc-to-dc converter topologies aimed at high-power high-frequency applications are introduced. Major system parasitics, namely, the leakage inductance of the transformer and the device output capacitance are efficiently utilized. Of the three circuits, the single-phase and three-phase versions of the dual active bridge topology demonstrate minimal stresses, better utilization of the transformer, bidirectional, and buck-boost modes of operation. All circuits operate at a constant switching frequency, thus simplifying design of the reactive elements. The power transfer characteristics and soft-switching regions on the Vout-Iout plane are identified. Two coaxial transformers with different cross-sections were built for a rating of 50 kVA. Based on the single-phase dual active bridge topology, a 50 kW, 50 kHz converter operating at an input voltage of 200 Vdc and an output voltage of 1600 Vdc was fabricated. Characteristics of current-fed output make the dual active bridge topologies amenable to paralleling and hence extension to megawatt power levels. Projections to a 1 MW system operating from a 500 Vdc input, at an output voltage of 10 kVdc and a switching frequency of 50 kHz, using MOS-controlled thyristors, coaxially wound transformers operating at three times the present current density with cooling, and multilayer ceramic capacitors, suggests an overall power density of 0.075 to 0.08 kg/kW and an overall efficiency of 96 percent.

Divan, Deepakraj M.↗

NASA NTRS2011

Humidity Steady State Low Voltage Testing of MLCCs (Based on NESC Technical Assessment Report)

Review of the low voltage reduced Insulation Resistance (IR) failure phenomenon in Multilayer ceramic capacitors (MLCCs)and NASA approaches to contend with this risk. 1. Analyze published materials on root cause mechanisms. 2. Investigate suitability of current test methods to assess MLCC lots for susceptibility. 3. Review current NASA parts selection and application guidelines in consideration of benefits vs. disadvantages.

Sampson, Mike↗

NASA NTRS2004

COTS Ceramic Chip Capacitors: An Evaluation of the Parts and Assurance Methodologies

Commercial-Off-The-Shelf (COTS) multilayer ceramic chip capacitors (MLCCs) are continually evolving to reduce physical size and increase volumetric efficiency. Designers of high reliability aerospace and military systems are attracted to these attributes of COTS MLCCs and would like to take advantage of them while maintaining the high standards for long-term reliable operation they are accustomed io when selecting military qualified established reliability (MIL-ER) MLCCs. However, MIL-ER MLCCs are not available in the full range of small chip sizes with high capacitance as found in today's COTS MLCCs. The objectives for this evaluation were to assess the long-term performance of small case size COTS MLCCs and to identify effective, lower-cost product assurance methodologies. Fifteen (15) lots of COTS X7R dielectric MLCCs from four (4) different manufacturers and two (2) MIL-ER BX dielectric MLCCs from two (2) of the same manufacturers were evaluated. Both 0805 and 0402 chip sizes were included. Several voltage ratings were tested ranging from a high of 50 volts to a low of 6.3 volts. The evaluation consisted of a comprehensive screening and qualification test program based upon MIL-PRF-55681 (i.e., voltage conditioning, thermal shock, moisture resistance, 2000-hour life test, etc.). In addition, several lot characterization tests were performed including Destructive Physical Analysis (DPA), Highly Accelerated Life Test (HALT) and Dielectric Voltage Breakdown Strength. The data analysis included a comparison of the 2000-hour life test results (used as a metric for long-term performance) relative to the screening and characterization test results. Results of this analysis indicate that the long-term life performance of COTS MLCCs is variable -- some lots perform well, some lots perform poorly. DPA and HALT were found to be promising lot characterization tests to identify substandard COTS MLCC lots prior to conducting more expensive screening and qualification tests. The results indicate that lot- specific screening and qualification are still recommended for high reliability applications. One significant and concerning observation is that MIL- type voltage conditioning (100 hours at twice rated voltage, 125 C) was not an effective screen in removing infant mortality parts for the particular lots of COTS MLCCs evaluated.

Brusse, Jay A.↗

NASA NTRS2014

Effect of Preconditioning and Soldering on Failures of Chip Tantalum Capacitors

Soldering of molded case tantalum capacitors can result in damage to Ta205 dielectric and first turn-on failures due to thermo-mechanical stresses caused by CTE mismatch between materials used in the capacitors. It is also known that presence of moisture might cause damage to plastic cases due to the pop-corning effect. However, there are only scarce literature data on the effect of moisture content on the probability of post-soldering electrical failures. In this work, that is based on a case history, different groups of similar types of CWR tantalum capacitors from two lots were prepared for soldering by bake, moisture saturation, and longterm storage at room conditions. Results of the testing showed that both factors: initial quality of the lot, and preconditioning affect the probability of failures. Baking before soldering was shown to be effective to prevent failures even in lots susceptible to pop-corning damage. Mechanism of failures is discussed and recommendations for pre-soldering bake are suggested based on analysis of moisture characteristics of materials used in the capacitors' design.

multilayer ceramic capacitor (MLCC)↗

NASA NTRS2014

Humidity Testing of PME and BME Ceramic Capacitors with Cracks

Cracks in ceramic capacitors are one of the major causes of failures during operation of electronic systems. Humidity testing has been successfully used for many years to verify the absence of cracks and assure quality of military grade capacitors. Traditionally, only precious metal electrode (PME) capacitors were used in high reliability applications and the existing requirements for humidity testing were developed for this type of parts. With the advance of base metal electrode (BME) capacitors, there is a need for assessment of the applicability of the existing techniques for the new technology capacitors. In this work, variety of different PME and BME capacitors with introduced cracks were tested in humid environments at different voltages and temperatures. Analysis of the test results indicates differences in the behavior and failure mechanisms for BME and PME capacitors and the need for different testing conditions.

reliability↗

NASA NTRS2023

Ceramic Capacitor Grain Size Analysis Using Electron Backscatter Diffraction (EBSD)

The overall scope of this NESC study was to identify (or develop) a tool, methodology, or process that can inspect a ceramic capacitor and consistently return repeatable grain size distribution results. It is important to note that the development of a machine learning technique was considered as an option for this study, but only if an existing automated tool was not available. This report explains why the Electron Backscatter Diffraction analysis method for grain structure and size distribution was deemed a suitable candidate for this work.

Electron Backscatter Diffraction↗

DOE OSTI2024

Novel ceramic capacitors with ultrahigh energy density and efficiency (Final Technical Report)

Antiferroelectric ceramics are a special class of material that have shown great potential as the dielectric in electrical capacitors due to their high energy- and power-density. During each charge-discharge cycle, the ceramic undergoes transformation to a ferroelectric phase and resumes its antiferroelectric phase. The hysteresis associated with the transitions leads to a mediocre energy efficiency and service lifetime of antiferroelectric capacitors and, hence, their almost absence in commercial products. Under the support of this research project, we first formulated a universal lattice-compatibility theory that included electrostatic polarization energy along with elastic energy and thermal energy to understand the origin of the hysteresis in antiferroelectric oxides. Guided by this compatibility theory, we conducted high-throughput density functional theory (DFT) calculations to assess chemical modifiers and their effect on crystal structures of 400+ PbZrO 3 -based compositions. Down-selected compositions were experimentally validated for their suppressed hysteresis and higher energy efficiency. The verified low-hysteresis compositions were then expanded to an antiferroelectric ceramic library with nearly 500 new compositions (more than 1,500 samples) using high-throughput experiments involving ceramic synthesis and property screening. The large quantity of data generated (theory and experimental) in these tasks were processed by machine-learning techniques and identified trends were fed to the next iteration. In the end, we successfully discovered four compositions with near-zero hysteresis, yielding a world-record energy efficiency of 98.2% at an energy density of 3.0 J/cm 3 . Furthermore, our antiferroelectric ceramic capacitor reaches 79.5 million charge-discharge cycles lifetime, a factor of 80 enhancement over previous antiferroelectric ceramics with large hysteresis. These research accomplishments have not only met the milestones set in the SOPO, but also led to two patent filings, three journal publications (one of them was in Advanced Materials, impact factor 29.4), and nine oral presentations at various venues. Through the course of the project, three postdocs, four Ph.D. students, and one M.S. student were trained. In short, our project established a new methodology in searching next-generation functional ceramics on the fundamental side and discovered several high-efficiency antiferroelectric compositions for capacitors on the applied side. Once fabricated into the multilayer form for commercial applications, these ceramic capacitors can potentially enable the high temperature high power density DC-link capacitors that are critical for the next generation inverters in electric vehicles. The project also significantly contributed to the nation’s workforce development in the STEM fields.

36 MATERIALS SCIENCE↗

NASA NTRS2015

Rocket Propulsion 21 Steering Committee Meeting (RP21) NASA In-Space Propulsion Update

In-house Support of NEXT-C Contract Status Thruster NEXT Long Duration Test post-test destructive evaluation in progress Findings will be used to verify service life models identify potential design improvements Cathode heater fabrication initiated for cyclic life testing Thruster operating algorithm definition verification initiated to provide operating procedures for mission users High voltage propellant isolator life test voluntarily terminated after successfully operating 51,200 h Power processor unit (PPU) Replaced all problematic stacked multilayer ceramic dual inline pin capacitors within PPU Test bed Rebuilt installed discharge power supply primary power board Completed full functional performance characterization Final test report in progress Transferred PPU Testbed to contractor to support prototype design effort.

Electric Propulsion↗

NASA NTRS1999

Nondestructive Detection of Cracks in Ceramics Using Vicinal Illumination

Cracks and other defects in ceramic materials can be difficult or impossible to examine and photograph due to the extreme lack of contrast. A method for inspecting translucent ceramics using scattered light, also known as vicinal illumination, will be described. This method has been known in the ceramics industry for quite some time, but is not well known in the testing and failure analysis community. Electronics applications include substrates, packages, multilayer capacitors, and thin film resistors. Ceramic materials are used in electronic applications as microcircuit packages and substrates which carry signals and power between microcircuits. Fine cracks in ceramic materials can result in mechanical failures, electrical failures, and loss of hermeticity. Often, fine cracks are difficult or impossible to detect using standard nondestructive inspection techniques such as visual inspection, ultrasonic inspection, or vapor crack detection. Dye penetrant inspection is usually effective, but contaminates the part, which is unacceptable for space flight hardware. One effective nondestructive inspection method of detecting cracks involves examining the way in which light scatters through the ceramic material when viewed with a standard bright field reflected light microscope. This method, termed vicinal illumination, has been used for detecting cracks during failure analyses of several part types, and screening of space flight hardware. The technique has proven effective on several different types of ceramic materials as well. A related method for use with dark field equipment has also been used to successfully locate otherwise invisible cracks.

Hull, Scott M.↗

NASA NTRS2016

500 C Electronic Packaging and Dielectric Materials for High Temperature Applications

High-temperature environment operable sensors and electronics are required for exploring the inner solar planets and distributed control of next generation aeronautical engines. Various silicon carbide (SiC) high temperature sensors, actuators, and electronics have been demonstrated at and above 500C. A compatible packaging system is essential for long-term testing and application of high temperature electronics and sensors. High temperature passive components are also necessary for high temperature electronic systems. This talk will discuss ceramic packaging systems developed for high temperature electronics, and related testing results of SiC circuits at 500C and silicon-on-insulator (SOI) integrated circuits at temperatures beyond commercial limit facilitated by these high temperature packaging technologies. Dielectric materials for high temperature multilayers capacitors will also be discussed. High-temperature environment operable sensors and electronics are required for probing the inner solar planets and distributed control of next generation aeronautical engines. Various silicon carbide (SiC) high temperature sensors, actuators, and electronics have been demonstrated at and above 500C. A compatible packaging system is essential for long-term testing and eventual applications of high temperature electronics and sensors. High temperature passive components are also necessary for high temperature electronic systems. This talk will discuss ceramic packaging systems developed for high electronics and related testing results of SiC circuits at 500C and silicon-on-insulator (SOI) integrated circuits at temperatures beyond commercial limit facilitated by high temperature packaging technologies. Dielectric materials for high temperature multilayers capacitors will also be discussed.

dielectric performance↗