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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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DOE OSTI2018

Model Order Reduction of Nonviscously Damped Structural Dynamic Models

A reduced order modeling capability has been developed to reduce the computational burden associated with time-domain solutions of structural dynamic models with linear viscoelastic materials. The discretized equations-of-motion produce convolution integrals resulting in a linear system with nonviscous damping forces. The challenge associated with the reduction of nonviscously damped, linear systems is the selection and computation of the appropriate modal basis to perform modal projection. The system produces a nonlinear eigenvalue problem that is challenging to solve and requires use of specialized algorithms not readily available in commercial finite element packages. This SAND report summarizes the LDRD discoveries of a reduction scheme developed for monolithic finite element models and provides preliminary investigations to extensions of the method using component mode synthesis. In addition, this report provides a background overview of structural dynamic modeling of structures with linear viscoelastic materials, and provides an overview of a new code capability in Sierra Structural Dynamics to output the system level matrices computed on multiple processors.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2018

Efficient accesses of data structures using processing near memory

Systems, apparatuses, and methods for implementing efficient queues and other data structures. A queue may be shared among multiple processors and/or threads without using explicit software atomic instructions to coordinate access to the queue. System software may allocate an atomic queue and corresponding queue metadata in system memory and return, to the requesting thread, a handle referencing the queue metadata. Any number of threads may utilize the handle for accessing the atomic queue. The logic for ensuring the atomicity of accesses to the atomic queue may reside in a management unit in the memory controller coupled to the memory where the atomic queue is allocated.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2018

Simple coarse graining and sampling strategies for image recognition

A conceptually simple way to recognize images is to directly compare test-set data and training-set data. The accuracy of this approach is limited by the method of comparison used, and by the extent to which the training-set data covers the required configuration space. Here we show that this coverage can be substantially increased using simple strategies of coarse graining (replacing groups of images by their centroids) and sampling (using distinct sets of centroids in combination). We use the MNIST data set to show that coarse graining can be used to convert a subset of training images into about an order of magnitude fewer image centroids, with no loss of accuracy of classification of test-set images by direct (nearest-neighbor) classification. Distinct batches of centroids can be used in combination as a means of sampling configuration space, and can classify test-set data more accurately than can the unaltered training set. The approach works most naturally with multiple processors in parallel.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2018

Simulating the Effect of Fracture Connectivity on Repository Performance with GDSA Framework - 18589

This work examines the possible migration of radionuclides from a deep geologic nuclear waste repository sited in fractured crystalline host rock. The key safety concern is the potential effect on waste isolation of the inter-connectivity of the fracture network, which is primarily established by the temporal evolution of the temperature and stress fields at the time of original rock intrusion and cooling. Two end members are considered in these simulations, one with a high degree of connectivity to the biosphere, such that advective transport through the fracture and fault network controls radionuclide migration, and the other with a low degree of connectivity, such that slow diffusive transport through the crystalline rock matrix is the controlling process for radionuclide migration to the biosphere. Both end members have several areally extensive, high-transmissivity deformation zones, whose distance to the repository is an important factor for waste isolation capability. Uncertainties in fracture properties (transmissivity, orientation, radius) and fracture distribution also give rise to uncertainty in waste isolation capability (i.e., the overall connectivity of the repository with the surface biosphere). These types of natural system uncertainties are generally present in any geologic site-characterization program and thus represent an important factor in assessing repository performance in hard rock environments. The waste considered in these simulations are spent fuel rod assemblies from the U.S. commercial nuclear reactor fleet. Thermal output of the waste must be considered in the simulations and can influence the rate and timing of waste package failure, waste form degradation, and fluid flux due to thermal expansion around the repository horizon. To achieve a high-fidelity representation of radionuclide transport in fractures and rock matrix, combined with thermal energy transport and fluid flow in fractures and matrix, the mathematical model is solved numerically in a parallel high-performance computing (HPC) environment on a finite volume unstructured grid consisting of approximately 5 million cells, using Geologic Disposal Safety Assessment (GDSA) Framework (https://pa.sandia.gov), an open-source performance assessment tool for deep underground disposal of nuclear waste. GDSA Framework uses PFLOTRAN to solve the balance equations on a three-dimensional grid with heterogeneous properties, using multiple processors in a parallel configuration based on domain decomposition. The fracture networks in these simulations are originally generated as discrete fracture networks (DFNs), which are sets of two-dimensional planes distributed in a three-dimensional domain. The method used in GDSA Framework maps the stochastically generated DFN to an equivalent continuous porous medium (ECPM) domain that allows for the simulation of coupled heat flow, fluid flow, and radionuclide transport, including heat conduction through the matrix of the fractured rock, which is a process not easily modeled in a DFN representation. Computational efficiency is also greatly enhanced using the ECPM method, allowing for a realistic representation and analysis of uncertainties in a multi-realization performance assessment of a deep geologic repository. The effect of fracture connectivity on the waste isolation safety function, as brought to light by these GDSA Framework simulations, points to the importance of including a realistic representation of uncertainties in fracture properties and distribution (effectively, uncertainty in spatial heterogeneity) in repository safety assessment simulations. (authors)

12 MANAGEMENT OF RADIOACTIVE AND NON-RADIOACTIVE W↗

DOE OSTI2018

Multiple-core computer processor for reverse time migration

A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of the plurality of caches being associated with one and only one of the plurality of processor cores, and a plurality of memories, each of the plurality of memories being associated with a different set of at least one of the plurality of processor cores and each of the plurality of memories being configured to be visible in a global memory address space such that the plurality of memories are visible to two or more of the plurality of processor cores, wherein at least one of a number of the processor cores, a size of each of the plurality of caches, or a size of each of the plurality of memories is configured for performing a reverse-time-migration (RTM) computation.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2018

Multiple core computer processor with globally-accessible local memories

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2019

Selective data retrieval based on access latency

A processor includes multiple processing units (e.g., processor cores), with each processing unit associated with at least one private, dedicated cache. The processor is also associated with a system memory that stores all data that can be accessed by the multiple processing units. A coherency manager (e.g., a coherence directory) of the processor enforces a specified coherency scheme to ensure data coherency between the different caches and between the caches and the system memory. In response to a memory access request to a given cache resulting in a cache miss, the coherency manager identifies the current access latency to the system memory as well as the current access latencies to other caches of the processor. The coherency manager transfers the targeted data to the given cache from the cache or system memory having the lower access latency.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2020

Evaluating asynchronous Schwarz solvers on GPUs

With the commencement of the exascale computing era, we realize that the majority of the leadership supercomputers are heterogeneous and massively parallel. Even a single node can contain multiple co-processors such as GPUs and multiple CPU cores. For example, ORNL’s Summit accumulates six NVIDIA Tesla V100 GPUs and 42 IBM Power9 cores on each node. Synchronizing across compute resources of multiple nodes can be prohibitively expensive. Hence, it is necessary to develop and study asynchronous algorithms that circumvent this issue of bulk-synchronous computing. In this study, we examine the asynchronous version of the abstract Restricted Additive Schwarz method as a solver. We do not explicitly synchronize, but allow the communication between the sub-domains to be completely asynchronous, thereby removing the bulk synchronous nature of the algorithm. We accomplish this by using the one-sided Remote Memory Access (RMA) functions of the MPI standard. We study the benefits of using such an asynchronous solver over its synchronous counterpart. We also study the communication patterns governed by the partitioning and the overlap between the sub-domains on the global solver. Finally, we show that this concept can render attractive performance benefits over the synchronous counterparts even for a well-balanced problem.

Nayak, Pratik↗

DOE OSTI2023

Suppressing Quantum Circuit Errors Due to System Variability

We present a quantum circuit optimization technique that takes into account the variability in error rates that is inherent across present-day noisy quantum computing platforms. This method can be run after qubit routing or postcompilation and consists of computing isomorphic subgraphs to input circuits and scoring each using heuristic cost functions derived from system calibration data. Using an independent standard algorithmic test suite, we show that it is possible to recover on average nearly 40% of missing fidelity using better qubit selection via efficient to compute cost functions. We demonstrate additional performance gains by considering qubit placement over multiple quantum processors. The overhead from these tools is minimal with respect to other compilation steps, such as qubit routing, as the number of qubits increases. As such, our method can be used to find qubit mappings for problems at the scale of quantum advantage and beyond.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2020

Scaled-up Neuromorphic Array Communications Controller (SNACC) for Large-scale Neural Networks

Neuromorphic computing is one promising post-Moore’s law era technology, which takes inspiration from biological brains to perform computing tasks. The human brain contains billions of neurons with trillions of synapses and as neuromorphic hardware systems scale to larger and larger sizes, the communication system used to transfer information between neuromorphic elements and traditional computers must scale to keep up. In prior work, we describe the use of a separate neuromorphic array communications controller to support low-latency, high-throughput communication between our neuromorphic systems and a traditional computer. In this work, the neuromorphic array communications controller is used to support the scaling of a neuromorphic development system which uses multiple neuromorphic processors arranged in a two-dimensional array. The neuromorphic array communications controller, along with scalable local connections, is used to create a scalable neuromorphic platform to enable the development and testing of large neuromorphic network arrays.

Young, Aaron↗

DOE OSTI2023

Codesign for Extreme Heterogeneity: Integrating Custom Hardware With Commodity Computing Technology to Support Next-Generation HPC Converged Workloads

Not Available

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2018

Hybrid memory module bridge network and buffers

Systems, apparatuses, and methods for implementing a hybrid memory module bridge network and buffers are disclosed. A system includes one or more host processors and multiple memory modules. Each memory module includes a relatively low pin count, high-bandwidth serial link to one or more other memory modules to perform inter-memory data transfers without consuming host-memory bandwidth. In one embodiment, a first memory module acts as a cache and a second memory module acts as the main memory for the system. The traffic between the host and the first memory module utilizes a first interface, and the cache traffic between the first and second memory modules utilizes a second interface. Cache line fill and writeback transfers between the first and second memory modules occur in parallel with timing-critical cache demand accesses from the host, in a latency-tolerant and buffered manner, without interfering with the cache demand accesses.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2021

Deterministic multi-qubit entanglement in a quantum network

High-fidelity deterministic quantum state transfer and multi-qubit entanglement are demonstrated in a quantum network comprising two superconducting quantum nodes one metre apart, with each node including three interconnected qubits. The generation of high-fidelity distributed multi-qubit entanglement is a challenging task for large-scale quantum communication and computational networks. The deterministic entanglement of two remote qubits has recently been demonstrated with both photons and phonons. However, the deterministic generation and transmission of multi-qubit entanglement has not been demonstrated, primarily owing to limited state-transfer fidelities. Here we report a quantum network comprising two superconducting quantum nodes connected by a one-metre-long superconducting coaxial cable, where each node includes three interconnected qubits. By directly connecting the cable to one qubit in each node, we transfer quantum states between the nodes with a process fidelity of 0.911 +/- 0.008. We also prepare a three-qubit Greenberger-Horne-Zeilinger (GHZ) state in one node and deterministically transfer this state to the other node, with a transferred-state fidelity of 0.656 +/- 0.014. We further use this system to deterministically generate a globally distributed two-node, six-qubit GHZ state with a state fidelity of 0.722 +/- 0.021. In this work, the GHZ state fidelities are clearly above the threshold of 1/2 for genuine multipartite entanglement, showing that this architecture can be used to coherently link together multiple superconducting quantum processors, providing a modular approach for building large-scale quantum computers.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2022

pnnl/eqc

EQC is a software framework for smart distributed quantum computer management and organization for variational quantum algorithms. EQC utilizes smart real time management of multiple independent quantum processors to maximize variational quantum algorithm throughput, for improved converged performance and improved rate of convergance.

Central, PNNL Developer↗

DOE OSTI2019

Performance optimization, modeling and analysis of sparse matrix-matrix products on multi-core and many-core processors

Sparse matrix-matrix multiplication (SpGEMM) is a computational primitive that is widely used in areas ranging from traditional numerical applications to recent big data analysis and machine learning. Although many SpGEMM algorithms have been proposed, hardware specific optimizations for multi- and many-core processors are lacking and a detailed analysis of their performance under various use cases and matrices is not available. In this work, we firstly identify and mitigate multiple bottlenecks with memory management and thread scheduling on Intel Xeon Phi (Knights Landing or KNL). Specifically targeting many-core processors, we develop a hash-table-based algorithm and optimize a heap-based shared-memory SpGEMM algorithm. We examine their performance together with other publicly available codes. Different from the literature, our evaluation also includes use cases that are representative of real graph algorithms, such as multi-source breadth-first search or triangle counting. Our hash-table and heap-based algorithms are showing significant speedups from libraries in the majority of the cases while different algorithms dominate the other scenarios with different matrix size, sparsity, compression factor and operation type. We wrap up in-depth evaluation results and make a recipe to give the best SpGEMM algorithm for target scenario. We build the performance model for hash-table and heap-based algorithms, which supports the recipe. A critical finding is that hash-table-based SpGEMM gets a significant performance boost if the nonzeros are not required to be sorted within each row of the output matrix. Finally, we integrate our implementations into a large-scale protein clustering code named HipMCL, accelerating its SpGEMM kernel by up to 10X and achieving an overall performance boost for the whole HipMCL application by 2.6X.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2019

Approximation algorithms in combinatorial scientific computing

We survey recent work on approximation algorithms for computing degree-constrained subgraphs in graphs and their applications in combinatorial scientific computing. The problems we consider include maximization versions of cardinality matching, edge-weighted matching, vertex-weighted matching and edge-weighted $b$ -matching, and minimization versions of weighted edge cover and $b$ -edge cover. Exact algorithms for these problems are impractical for massive graphs with several millions of edges. For each problem we discuss theoretical foundations, the design of several linear or near-linear time approximation algorithms, their implementations on serial and parallel computers, and applications. Our focus is on practical algorithms that yield good performance on modern computer architectures with multiple threads and interconnected processors. We also include information about the software available for these problems.

Mathematics↗

DOE OSTI2025

Implementation of McMurchie–Davidson Algorithm for Gaussian AO Integrals Suited for SIMD Processors

We report an implementation of the McMurchie− Davidson evaluation scheme for 1- and 2-particle Gaussian AO integrals designed for processors with Single Instruction Multiple Data (SIMD) instruction sets. Like in our recent MD implementation for graphical processing units (GPUs) [Asadchev, A.; Valeev, E. F.. J. Chem. Phys. 2024, 160, 244109.], variable-sized batches of shellsets of integrals are evaluated at a time. By optimizing for the floating point instruction throughput rather than minimizing the number of operations, this approach achieves up to 50% of the theoretical hardware peak FP64 performance for many common SIMD-equipped platforms (AVX2, AVX512, NEON), which translates to speedups of up to 30 over the state-of-the-art one-shellset-at-a-time implementation of Obara−Saika-type schemes in Libint for a variety of primitive and contracted integrals. As with our previous work, we rely on the standard C++ programming language such as the std::simd standard library feature to be included in the 2026 ISO C++ standard without any explicit code generation to keep the code base small and portable. The implementation is part of the open source LibintX library freely available at https://github.com/ValeevGroup/libintx.

Basis sets↗

DOE OSTI2021

Performance Characteristics of the BlueField-2 SmartNIC

High-performance computing (HPC) researchers have long envisioned scenarios where application workflows could be improved through the use of programmable processing elements embedded in the network fabric. Recently, vendors have introduced programmable Smart Network Interface Cards (SmartNICs) that enable computations to be offloaded to the edge of the network. There is great interest in both the HPC and high-performance data analytics (HPDA) communities in understanding the roles these devices may play in the data paths of upcoming systems. This paper focuses on characterizing both the networking and computing aspects of NVIDIA’s new BlueField-2 SmartNIC when used in a 100Gb/s Ethernet environment. For the networking evaluation we conducted multiple transfer experiments between processors located at the host, the SmartNIC, and a remote host. These tests illuminate how much effort is required to saturate the network and help estimate the processing headroom available on the SmartNIC during transfers. For the computing evaluation we used the stress-ng benchmark to compare the BlueField-2 to other servers and place realistic bounds on the types of offload operations that are appropriate for the hardware. Our findings from this work indicate that while the BlueField-2 provides a flexible means of processing data at the network’s edge, great care must be taken to not overwhelm the hardware. While the host can easily saturate the network link, the SmartNIC’s embedded processors may not have enough computing resources to sustain more than half the expected bandwidth when using kernel-space packet processing. From a computational perspective, encryption operations, memory operations under contention, and on-card IPC operations on the SmartNIC perform significantly better than the general-purpose servers used for comparisons in our experiments. Therefore, applications that mainly focus on these operations may be good candidates for offloading to the SmartNIC.

97 MATHEMATICS AND COMPUTING↗