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At least 37 records · Page 2

Submicrosecond comparison of intercontinental clock synchronization by VLBI and the NTS satellite

The intercontinental clock synchronization capabilities of Very Long Baseline Interferometry (VLBI) and the Navigation Technology Satellite (NTS) were compared in May 1978 by using both methods to synchronize the cesium clocks at the NASA Deep Space Net complexes at Madrid, Spain, and Goldstone, California. The VLBI experiments used the Wideband VLBI Data Acquisition System. The Navigation Technology Satellites were used with NTS Timing Receivers developed by the Goddard Space Flight Center. The two methods agreed at about the one-half microsecond level. The VLBI system also obtained long-term stability information on the HP5061A004 cesium standards by measuring delta T/T over four 3- to 4-day intervals, obtaining stability estimates of (1 + or - 1)x10 to the -13th power for the combined timing systems.

Hurd, W. J.↗

Submicrosecond comparison of international clock synchronization by VLBI and the NTS satellite

The intercontinental clock synchronization capabilities of Very Long Baseline Interferometry (VLBI) and the Navigation Technology Satellite (NTS) were compared using both methods to synchronize the Cesium clocks at the NASA Deep Space Net complexes at Madrid, Spain and Goldstone, California. Verification of the accuracy of both systems was examined. The VLBI experiments used the Wideband VLBI Data Acquisition System developed at the NASA Jet Propulsion Laboratory. The NTS Satellites were designed and built by the Naval Research Laboratory used with NTS Timing Receivers developed by the Goddard Space Flight Center. The two methods agreed at about the one-half microsecond level.

Hurd, W. J.↗

A Self-Stabilizing Distributed Clock Synchronization Protocol for Arbitrary Digraphs

This report presents a self-stabilizing distributed clock synchronization protocol in the absence of faults in the system. It is focused on the distributed clock synchronization of an arbitrary, non-partitioned digraph ranging from fully connected to 1-connected networks of nodes while allowing for differences in the network elements. This protocol does not rely on assumptions about the initial state of the system, other than the presence of at least one node, and no central clock or a centrally generated signal, pulse, or message is used. Nodes are anonymous, i.e., they do not have unique identities. There is no theoretical limit on the maximum number of participating nodes. The only constraint on the behavior of the node is that the interactions with other nodes are restricted to defined links and interfaces. We present an outline of a deductive proof of the correctness of the protocol. A model of the protocol was mechanically verified using the Symbolic Model Verifier (SMV) for a variety of topologies. Results of the mechanical proof of the correctness of the protocol are provided. The model checking results have verified the correctness of the protocol as they apply to the networks with unidirectional and bidirectional links. In addition, the results confirm the claims of determinism and linear convergence. As a result, we conjecture that the protocol solves the general case of this problem. We also present several variations of the protocol and discuss that this synchronization protocol is indeed an emergent system.

Malekpour, Mahyar R.↗

Hardware-assisted software clock synchronization for homogeneous distributed systems

A clock synchronization scheme that strikes a balance between hardware and software solutions is proposed. The proposed is a software algorithm that uses minimal additional hardware to achieve reasonably tight synchronization. Unlike other software solutions, the guaranteed worst-case skews can be made insensitive to the maximum variation of message transit delay in the system. The scheme is particularly suitable for large partially connected distributed systems with topologies that support simple point-to-point broadcast algorithms. Examples of such topologies include the hypercube and the mesh interconnection structures.

Ramanathan, P.↗

An optimized implementation of a fault-tolerant clock synchronization circuit

A fault-tolerant clock synchronization circuit was designed and tested. A comparison to a previous design and the procedure followed to achieve the current optimization are included. The report also includes a description of the system and the results of tests performed to study the synchronization and fault-tolerant characteristics of the implementation.

Torres-Pomales, Wilfredo↗

Clock synchronization by accelerated observers - Metric construction for arbitrary congruences of world lines

Clock synchronization in an arbitrarily accelerated observer congruence is considered. A general solution is obtained that maintains the isotropy and coordinate independence of the one-way speed of light. Attention is also given to various particular cases including, rotating disk congruence or ring congruence. An explicit, congruence-based spacetime metric is constructed according to Einstein's clock synchronization procedure and the equation for the geodesics of the space-time was derived using Hamilton-Jacobi method. The application of interferometric techniques (absolute phase radio interferometry, VLBI) to the detection of the 'global Sagnac effect' is also discussed.

Henriksen, R. N.↗

A Self-Stabilizing Byzantine-Fault-Tolerant Clock Synchronization Protocol

This report presents a rapid Byzantine-fault-tolerant self-stabilizing clock synchronization protocol that is independent of application-specific requirements. It is focused on clock synchronization of a system in the presence of Byzantine faults after the cause of any transient faults has dissipated. A model of this protocol is mechanically verified using the Symbolic Model Verifier (SMV) [SMV] where the entire state space is examined and proven to self-stabilize in the presence of one arbitrary faulty node. Instances of the protocol are proven to tolerate bursts of transient failures and deterministically converge with a linear convergence time with respect to the synchronization period. This protocol does not rely on assumptions about the initial state of the system other than the presence of sufficient number of good nodes. All timing measures of variables are based on the node s local clock, and no central clock or externally generated pulse is used. The Byzantine faulty behavior modeled here is a node with arbitrarily malicious behavior that is allowed to influence other nodes at every clock tick. The only constraint is that the interactions are restricted to defined interfaces.

Malekpour, Mahyar R.↗

Fault-tolerant clock synchronization in distributed systems

Existing fault-tolerant clock synchronization algorithms are compared and contrasted. These include the following: software synchronization algorithms, such as convergence-averaging, convergence-nonaveraging, and consistency algorithms, as well as probabilistic synchronization; hardware synchronization algorithms; and hybrid synchronization. The worst-case clock skews guaranteed by representative algorithms are compared, along with other important aspects such as time, message, and cost overhead imposed by the algorithms. More recent developments such as hardware-assisted software synchronization and algorithms for synchronizing large, partially connected distributed systems are especially emphasized.

Ramanathan, Parameswaran↗

Correctness Proof of a Self-Stabilizing Distributed Clock Synchronization Protocol for Arbitrary Digraphs

This report presents a deductive proof of a self-stabilizing distributed clock synchronization protocol. It is focused on the distributed clock synchronization of an arbitrary, non-partitioned digraph ranging from fully connected to 1-connected networks of nodes while allowing for differences in the network elements. This protocol does not rely on assumptions about the initial state of the system, and no central clock or a centrally generated signal, pulse, or message is used. Nodes are anonymous, i.e., they do not have unique identities. There is no theoretical limit on the maximum number of participating nodes. The only constraint on the behavior of the node is that the interactions with other nodes are restricted to defined links and interfaces. We present a deductive proof of the correctness of the protocol as it applies to the networks with unidirectional and bidirectional links. We also confirm the claims of determinism and linear convergence.

Malekpour, Mahyar R.↗

System and method for clock synchronization and position determination using entangled photon pairs

A system and method for clock synchronization and position determination using entangled photon pairs is provided. The present invention relies on the measurement of the second order correlation function of entangled states. Photons from an entangled photon source travel one-way to the clocks to be synchronized. By analyzing photon registration time histories generated at each clock location, the entangled states allow for high accuracy clock synchronization as well as high accuracy position determination.

Shih, Yanhua↗

Subnanosecond GPS-based clock synchronization and precision deep-space tracking

Interferometric spacecraft tracking is accomplished by the Deep Space Network (DSN) by comparing the arrival time of electromagnetic spacecraft signals at ground antennas separated by baselines on the order of 8000 km. Clock synchronization errors within and between DSN stations directly impact the attainable tracking accuracy, with a 0.3-nsec error in clock synchronization resulting in an 11-nrad angular position error. This level of synchronization is currently achieved by observing a quasar which is angularly close to the spacecraft just after the spacecraft observations. By determining the differential arrival times of the random quasar signal at the stations, clock offsets and propagation delays within the atmosphere and within the DSN stations are calibrated. Recent developments in time transfer techniques may allow medium accuracy (50-100 nrad) spacecraft tracking without near-simultaneous quasar-based calibrations. Solutions are presented for a worldwide network of Global Positioning System (GPS) receivers in which the formal errors for DSN clock offset parameters are less than 0.5 nsec. Comparisons of clock rate offsets derived from GPS measurements and from very long baseline interferometry (VLBI), as well as the examination of clock closure, suggest that these formal errors are a realistic measure of GPS-based clock offset precision and accuracy. Incorporating GPS-based clock synchronization measurements into a spacecraft differential ranging system would allow tracking without near-simultaneous quasar observations. The impact on individual spacecraft navigation-error sources due to elimination of quasar-based calibrations is presented. System implementation, including calibration of station electronic delays, is discussed.

Dunn, C. E.↗

Formal verification of a fault tolerant clock synchronization algorithm

A formal specification and mechanically assisted verification of the interactive convergence clock synchronization algorithm of Lamport and Melliar-Smith is described. Several technical flaws in the analysis given by Lamport and Melliar-Smith were discovered, even though their presentation is unusally precise and detailed. It seems that these flaws were not detected by informal peer scrutiny. The flaws are discussed and a revised presentation of the analysis is given that not only corrects the flaws but is also more precise and easier to follow. Some of the corrections to the flaws require slight modifications to the original assumptions underlying the algorithm and to the constraints on its parameters, and thus change the external specifications of the algorithm. The formal analysis of the interactive convergence clock synchronization algorithm was performed using the Enhanced Hierarchical Development Methodology (EHDM) formal specification and verification environment. This application of EHDM provides a demonstration of some of the capabilities of the system.

Rushby, John↗

Formal development of a clock synchronization circuit

This talk presents the latest stage in formal development of a fault-tolerant clock synchronization circuit. The development spans from a high level specification of the required properties to a circuit realizing the core function of the system. An abstract description of an algorithm has been verified to satisfy the high-level properties using the mechanical verification system EHDM. This abstract description is recast as a behavioral specification input to the Digital Design Derivation system (DDD) developed at Indiana University. DDD provides a formal design algebra for developing correct digital hardware. Using DDD as the principle design environment, a core circuit implementing the clock synchronization algorithm was developed. The design process consisted of standard DDD transformations augmented with an ad hoc refinement justified using the Prototype Verification System (PVS) from SRI International. Subsequent to the above development, Wilfredo Torres-Pomales discovered an area-efficient realization of the same function. Establishing correctness of this optimization requires reasoning in arithmetic, so a general verification is outside the domain of both DDD transformations and model-checking techniques. DDD represents digital hardware by systems of mutually recursive stream equations. A collection of PVS theories was developed to aid in reasoning about DDD-style streams. These theories include a combinator for defining streams that satisfy stream equations, and a means for proving stream equivalence by exhibiting a stream bisimulation. DDD was used to isolate the sub-system involved in Torres-Pomales' optimization. The equivalence between the original design and the optimized verified was verified in PVS by exhibiting a suitable bisimulation. The verification depended upon type constraints on the input streams and made extensive use of the PVS type system. The dependent types in PVS provided a useful mechanism for defining an appropriate bisimulation.

Miner, Paul S.↗

Using GLONASS signal for clock synchronization

Although in accuracy parameters GLONASS is correlated with GPS, using GLONASS signals for high-precision clock synchronization was, up to the recent time, of limited utility due to the lack of specialized time receivers. In order to improve this situation, in late 1992 the Russian Institute of Radionavigation and Time (RMT) began to develop a GLONASS time receiver using as a basis the airborne ASN-16 receiver. This paper presents results of estimating user clock synchronization accuracy via GLONASS signals using ASN-16 receiver in the direct synchronization and common-view modes.

Gouzhva, Yuri G.↗

A survey of provably correct fault-tolerant clock synchronization techniques

Six provably correct fault-tolerant clock synchronization algorithms are examined. These algorithms are all presented in the same notation to permit easier comprehension and comparison. The advantages and disadvantages of the different techniques are examined and issues related to the implementation of these algorithms are discussed. The paper argues for the use of such algorithms in life-critical applications.

Butler, Ricky W.↗

Picosecond Clock Synchronization Across A 7-Node Metropolitan Scale Quantum Network

Quantum networking protocols relying on interference and precise time-of-flight measurements require high precision clock synchronization. This study describes the design, implementation, and characterization of two optical time transfer methods in a metropolitan-scale quantum networking research testbed. The first technique called active electronic stabilization (ELSTAB), was able to achieve sub-picosecond time deviation (TDEV) at integration times between 1 s and 105s over multiple different fiber lengths of both underground and aerial deployed fiber. The second technique, White Rabbit-Precision Time Protocol (WR-PTP), was able to achieve 10-picosecond TDEV’s over similar fiber lengths at comparable integration times. Environmental fluctuations affected the stability of clock synchronization over deployed fiber. These fluctuations resulted in path delay gradients, chromatic dispersion, polarization drift, and optical power variations. The results from this study will inform future work in the development of compensation methods essential for enabling experimental research in developing practical quantum networking protocols.

synchronization↗