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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Optical computing with laser light

Linear and nonlinear optical processing techniques (Fourier transformation, convolution and correlation, arithmetic operations - addition and subtraction with gratings, generalized orthogonal transformations; theta modulation, half-tone screen process, optical feedback) for mathematical computations are reviewed. The use of gratings and computer holograms in addition, subtraction, differentiation, and application of generalized transformations is discussed. Use of nonlinear optical elements with or without optical coherent feedback in such nonlinear operations as taking logarithms and thresholding is described. Applications in hybrid systems incorporating digital computer and optical processor with real-time interface devices, or optical threshold and logic devices for parallel processing to apply digital techniques to optical information are considered.

Lee, S. H.↗
NASA NTRS2012

Low-power triggered data acquisition system and method

A low-power triggered data acquisition system and method utilizes low-powered circuitry, comparators, and digital logic incorporated into a miniaturized device interfaced with self-generating transducer sensor inputs to detect, identify and assess impact and damage to surfaces and structures wherein, upon the occurrence of a triggering event that produces a signal greater than a set threshold changes the comparator output and causes the system to acquire and store digital data representative of the incoming waveform on at least one triggered channel. The sensors may be disposed in an array to provide triangulation and location of the impact.

Champaigne, Kevin↗
NASA NTRS1974

A digital mixer, part 2

A study was made to determine the characteristic response of D flip-flop digital logic units used as mixing devices for telemetry applications. The D flip-flop is shown to perform the mixing operation under a variety of input frequency conditions. The output signal is a rectangular wave whose long term average frequency is the desired difference frequency. The output signal contains frequency jitter which is a function of the relationship between the two input frequencies. The seriousness of the jitter depends on the application.

Honnell, M. A.↗
DOE OSTI2021

OPERATING EXPERIENCE AND ITS RELATIONSHIP TO EMBEDDED DIGITAL DEVICES IN SAFETY SYSTEMS

Interest in embedded digital devices (EDDs) for monitoring and providing control of components is increasing and the added functionality digital brings such as diagnostics, displays, control functions is welcomed in both the nuclear and other industries. As a result, pure analog-based components continue to disappear from the industrial I&C marketplace. Equipment with EDDs, also known by related terms such as smart devices, intelligent devices, and digital devices of limited functionality, can include sensors, breakers, priority logic modules, time delay relays, pumps, valve actuators, motor control centers, and uninterruptible power supplies. Not only is equipment consisting of analog and older digital technology being replaced with commercial grade products containing EDDs, but EDDs can also be retrofitted to work with existing components. EDDs may be installed physically within a component, such as in a relay. There are also external devices that some would not consider an EDD, but that operate in almost all technical ways identically to one internal to a component such as in a valve controller. In fact, the digital portions may be located hundreds of feet from the actual component.Due to the potential of being used in an identical manner and without alteration from their application in other industries, operating experience (OpE) for EDDs may be much more applicable than in the case of other more system level devices. Clear separation and independence of functionality provided with EDDs may also allow greater applicability of existing OpE from industry for changes that can be shown not to affect its safety function. However, OpE also demonstrates issues with different conditions between other industries and nuclear power plants, such as issues with undeclared changes or undeclared digital devices and the new failure modes they may introduce, issues with the reporting of OpE in industry, and a lack of transparency into OpE for EDDs.Understanding and addressing these issues will be key in the future use of EDDs in nuclear power plants, but failure rate data is difficult to obtain for EDDs, and lessons learned from the use of EDDs are difficult to collect and identify.Key words: embedded digital device, smart device, operating experience, failure modes

Muhlheim, Michael↗
NASA NTRS2012

Digital Architecture for a Trace Gas Sensor Platform

A digital architecture has been implemented for a trace gas sensor platform, as a companion to standard analog control electronics, which accommodates optical absorption whose fractional absorbance equivalent would result in excess error if assumed to be linear. In cases where the absorption (1-transmission) is not equivalent to the fractional absorbance within a few percent error, it is necessary to accommodate the actual measured absorption while reporting the measured concentration of a target analyte with reasonable accuracy. This requires incorporation of programmable intelligence into the sensor platform so that flexible interpretation of the acquired data may be accomplished. Several different digital component architectures were tested and implemented. Commercial off-the-shelf digital electronics including data acquisition cards (DAQs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), and microcontrollers have been used to achieve the desired outcome. The most completely integrated architecture achieved during the project used the CPLD along with a microcontroller. The CPLD provides the initial digital demodulation of the raw sensor signal, and then communicates over a parallel communications interface with a microcontroller. The microcontroller analyzes the digital signal from the CPLD, and applies a non-linear correction obtained through extensive data analysis at the various relevant EVA operating pressures. The microcontroller then presents the quantitatively accurate carbon dioxide partial pressure regardless of optical density. This technique could extend the linear dynamic range of typical absorption spectrometers, particularly those whose low end noise equivalent absorbance is below one-part-in-100,000. In the EVA application, it allows introduction of a path-length-enhancing architecture whose optical interference effects are well understood and quantified without sacrificing the dynamic range that allows quantitative detection at the higher carbon dioxide partial pressures. The digital components are compact and allow reasonably complete integration with separately developed analog control electronics without sacrificing size, mass, or power draw.

Gonzales, Paula↗
DOE OSTI2022

Programmable soft valves for digital and analog control

In soft devices, complex actuation sequences and precise force control typically require hard electronic valves and microcontrollers. Existing designs for entirely soft pneumatic control systems are capable of either digital or analog operation, but not both, and are limited by speed of actuation, range of pressure, time required for fabrication, or loss of power through pull-down resistors. Using the nonlinear mechanics intrinsic to structures composed of soft materials—in this case, by leveraging membrane inversion and tube kinking—two modular soft components are developed: a piston actuator and a bistable pneumatic switch. These two components combine to create valves capable of analog pressure regulation, simplified digital logic, controlled oscillation, nonvolatile memory storage, linear actuation, and interfacing with human users in both digital and analog formats. Three demonstrations showcase the capabilities of systems constructed from these valves: 1) a wearable glove capable of analog control of a soft artificial robotic hand based on input from a human user’s fingers, 2) a human-controlled cushion matrix designed for use in medical care, and 3) an untethered robot which travels a distance dynamically programmed at the time of operation to retrieve an object. This work illustrates pathways for complementary digital and analog control of soft robots using a unified valve design.

42 ENGINEERING↗
NASA NTRS1977

Memory device for two-dimensional radiant energy array computers

A memory device for two dimensional radiant energy array computers was developed, in which the memory device stores digital information in an input array of radiant energy digital signals that are characterized by ordered rows and columns. The memory device contains a radiant energy logic storing device having a pair of input surface locations for receiving a pair of separate radiant energy digital signal arrays and an output surface location adapted to transmit a radiant energy digital signal array. A regenerative feedback device that couples one of the input surface locations to the output surface location in a manner for causing regenerative feedback is also included

Schaefer, D. H.↗
NASA NTRS2010

N channel JFET based digital logic gate structure

A circuit topography is presented which is used to create usable digital logic gates using N (negatively doped) channel Junction Field Effect Transistors (JFETs) and load resistors, level shifting resistors, and supply rails whose values are based on the direct current (DC) parametric distributions of those JFETs. This method has direct application to the current state of the art in high temperature, for example 300.degree. C. to 500.degree. C. and higher, silicon carbide (SiC) device production. The ability to produce inverting and combinatorial logic enables the production of pulse and edge triggered latches. This scale of logic synthesis would bring digital logic and state machine capabilities to devices operating in extremely hot environments, such as the surface of Venus, near hydrothermal vents, within nuclear reactors (SiC is inherently radiation hardened), and within internal combustion engines. The basic logic gate can be configured as a driver for oscillator circuits allowing for time bases and simple digitizers for resistive or reactive sensors. The basic structure of this innovation, the inverter, can be reconfigured into various analog circuit topographies through the use of feedback structures.

Krasowski, Michael J.↗
DOE OSTI2025

A Digital Three Level Space Vector Modulator for High Frequency Vector Sequence Generation

This letter proposes a digital high-speed three-level space vector pulse width modulator (3L-SVPWM). A conventional 3L-SVPWM is typically computation-based, involving a sequential execution of sub-tasks on a digital signal processor (DSP) based controller. The resulting high computation time of 5.4 μs limits the implementation of additional control blocks for switching frequencies greater than 100 kHz. This is overcome by transforming sub-tasks into digital blocks with 1-0 decisions and simpler arithmetic operations. The sub-task blocks are executed concurrently on a programmable logic device (PLD). Hence, a fast 3L-SVPWM execution in 140 ns is achieved. The proposed digital 3L-SVPWM enables high switching frequency operation of wide bandgap (WBG) device-based 3 L inverters to generate high fundamental frequency waveforms. A finite state machine is an integral part of the proposed implementation with the ability to generate any vector sequence, maximizing the usage of redundant vector states in 3L-SVPWM. Here, the proposed digital 3L-SVPWM operation is demonstrated with a GaN-based 3 L active neutral point clamped (3L-ANPC) inverter. Experimental results are presented at 250 kHz switching frequency to generate vector sequences for center-aligned SVPWM (CA-SVPWM) and common mode voltage reduced SVPWM (CMVR-SVPWM). The results also showcase a high fundamental frequency generation capability of 10 kHz.

active neutral point clamped inverter↗
DOE OSTI2022

Radiation-Hardened GaN HEMT and Cell Design, Modeling, and Fabrication for Nuclear Instrumentation Applications

Recent advances in nuclear power generation technologies show great promise for efficient, safe generation of carbon-free power in the near future. Consequently, many new generation reactor designs are being pursued by government and industry groups, including both fission- and fusion-based technologies. Radiation- and temperature-tolerant sensor technology continues to advance, yet development of the electronics/instrumentation technologies suitable for these environments have fallen behind. Industry has adequately addressed harsh environment electronics needs for low earth orbit satellites, but the much more extreme conditions associated with electronics placed near or in a reactor core remain unaddressed. This project investigates the use of gallium nitride (GaN) circuit technology to address the unique needs for sensor interface electronics and communications in reactor environments. This report provides a summary of the first year’s project activities related to developing and optimizing devices and circuits for this GaN high electronic mobility transistor (HEMT) process. Activities reported include multiple analog and digital circuit designs simulated using custom Verilog-A models generated from measured GaN devices fabricated in the target process. Digital circuit designs included fundamental logic circuits such as an inverter, NAND, NOR, AND and OR gates, as well as a 5-stage ring oscillator. Each design was simulated using an open-source SPICE simulator, and an integrated circuit layout was produced of each design for use in future fabrication. Analog circuit designs focused on the fundamental building blocks to be used to construct sensor interface and communications circuits. These included current mirrors, matched differential pairs, and a Gilbert cell mixer design, each with an associated integrated circuit layout. Layout tools used for these designs included two open-source packages—KLayout and Magic—which were customized for specific use with the OSU GaN process layers. Design rules and preliminary device extraction capabilities were built for the Magic tool to enable device extraction and subsequent netlist generation for SPICE simulation. Finally, future research directions for year two are summarized. When the year-two directions are implemented, the project will be in position to advance the state of the art in electronics for near- or in-reactor sensor interfacing and communications.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗
NASA NTRS1989

Single chip fixed frequency bit synchronizer

A single chip, fixed frequency suboptimum bit synchronizer design which was implemented utilizing a programmable logic device is described. The bit synchronizer is modeled after a digital transition tracking loop for symbol estimation and employs a first-order incremental phase modulator for closed-loop symbol synchronization. The BER and tracking performance is modeled and compared to optimum designs. The bit synchronizer was developed for the Space Shuttle.

Butler, Madeline J.↗
NASA NTRS2004

IBM powerPC 405 SEU mitigation using processor voting techniques in Xilinx Virtex-I1 pro FPGA

Not until recently, Xilinx has developed a new field programmable gate array (FPGA) device family, Virtex-I1 Pro. In this single device, not only dies it have density logic cells (3K to125K), gigabit connectivity, on chip memory, digital clock management, but also it can have up to four IBM PowerPC 405 Processor hard cores, running up to 400MHz and 633 Mbps. To utilize this cutting edge device in space applications, a few Single Event Upset (SEU) mitigation techniques need to be implemented to a design for the device. At Jet Propulsion Laboratory (JPL), we have successfully demonstrated the feasibility of running multiple processors running in a lock step fashion to accomplish SEU mitigation and fault tolerance.

single event upset (SEU)↗
NASA NTRS1992

Interface For Dual-Channel MIL-STD-1553 Data Bus

Digital electronic subsystem made of commercially available programmable logic arrays and discrete logic devices serves as interface between microprocessor and dual-channel MIL-STD-1553 data bus. Subsystem consumes only 800 mW of power. Provides flexibility in that it is controllable via firmware. Includes only two reading-and-writing ports: one for status and control signals, other for transmission and reception of data.

Davies, Bryan L.↗
NASA NTRS2010

Electrically Variable Resistive Memory Devices

Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

Liu, Shangqing↗
NASA NTRS2000

Programmable Logic Application Notes

This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing: Digital Timing Analysis Tools and Techniques. Articles in this issue include: SX and SX-A Series Devices Power Sequencing; JTAG and SXISX-AISX-S Series Devices; Analysis Techniques (i.e., notes on digital timing analysis tools and techniques); Status of the Radiation Hard reconfigurable Field Programmable Gate Array Program, Input Transition Times; Apollo Guidance Computer Logic Study; RT54SX32S Prototype Data Sets; A54SX32A - 0.22 micron/UMC Test Results; Ramtron FM1608 FRAM; and Analysis of VHDL Code and Synthesizer Output.

Katz, Richard↗